LT8410 Ver la hoja de datos (PDF) - Linear Technology

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LT8410

Ultralow Power Boost Converter with Output Disconnect

Linear Technology 

APPLICATIONS INFORMATION

Board Layout Considerations

As with all switching regulators, careful attention must

be paid to the PCB layout and component placement. To

maximize efficiency, switch rise and fall times are made as

short as possible. To prevent electromagnetic interference

(EMI) problems, proper layout of the high frequency

switching path is essential. The voltage signal of the SW pin

has sharp rising and falling edges. Minimize the length and

area of all traces connected to the SW pin and always use

a ground plane under the switching regulator to minimize

interplane coupling. In addition, the FBP pin and VREF pin

are sensitive to noise. Minimize the length and area of all

traces to these two pins is recommended. Recommended

component placement is shown in Figure 3.

LT8410/LT8410-1

VIN

SHDN

SHDN

VCC

GND

SW

FBP

VREF

CAP

GND

VOUT

CAPACITOR GROUNDS MUST BE

RETURNED DIRECTLY TO IC GROUND

8410-1 F03

Figure 3. Recommended Board Layout

84101f

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