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LT3652HVEDD Ver la hoja de datos (PDF) - Linear Technology

Número de pieza
componentes Descripción
Fabricante
LT3652HVEDD
Linear
Linear Technology Linear
LT3652HVEDD Datasheet PDF : 24 Pages
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LT3652HV
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at TA = 25°C. VIN = 20V, Boost – SW = 4V, SHDN = 2V, VFB = 3.3V, CTIMER = 0.68μF.
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
tTIMER
Full Charge Cycle Timeout
Precondition Timeout
3
hr
22.5
min
Timer Accuracy
l –10
10
%
fO
Operating Frequency
DC
Duty Cycle Range
Continuous Operation
1
MHz
l 15
90
%
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3652HV is tested under pulsed load conditions such that
TJ TA. The LT3652HVE is guaranteed to meet performance specifications
from 0°C to 85°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization, and correlation with statistical process controls. The
LT3652HVI specifications are guaranteed over the full –40°C to 125°C
operating junction temperature range. High junction temperatures degrade
operating lifetimes; operating lifetime is derated for junction temperatures
greater than 125°C.
Note 3: VIN minimum voltages below the start threshold are only
supported if (VBOOST-VSW) > 2V.
Note 4: This parameter is valid for programmed output battery float
voltages ≤ 4.2V. VIN operating range minimum is 0.75V above the
programmed output battery float voltage (VBAT(FLT) + 0.75V). VIN Start
Voltage is 3.3V above the programmed output battery float voltage
(VBAT(FLT) + 3.3V).
Note 5: Output battery float voltage (VBAT(FLT)) programming resistor
divider equivalent resistance = 250k compensates for input bias current.
Note 6: All VFB voltages measured through 250k series resistance.
Note 7: VSENSE(DC) is reduced by thermal foldback as junction temperature
approaches 125°C.
3652hvf
4

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