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LPC131X

NXP LPC microcontrollers

NXP Semiconductors. 

ROM

ROM

ROM

ROM

ROM

ROM

ROM

ROM

Special functions in ROM

Putting special functions in ROM helps increase design flexibility, reduce code size, and simplify

development. Options include programming algorithms, API-driven power profiles, USB drivers

and USB-compliant stacks for HID, MS, CDC, and DFU classes, peripheral APIs for CAN that

include extensible code and CANopen drivers, and an optimized divide library that reduces

CPU cycles.

USB 2.0 Host/Device/OTG interface

Nobody gives you more options for fully certified USB functionality. Our USB 2.0 Host/Device/

OTG interface includes DMA support and an on-chip high-speed PHY, and supports all four

transfer types (control, interrupt, bulk, isochronous). Many of our USB-equipped devices are

shipped with the USB device stack and certain class drivers pre-loaded in ROM.

CAN 2.0B interface

We were first to introduce a low-cost entry point for a total Controller Area Network (CAN)

solution. The CAN and CANopen drivers are embedded in ROM, so there’s more Flash memory

for product firmware. The high-performance interface supports bit rates up to 1 Mbit/s and

works with multi-drop and serial communications.

Ethernet interface

This full-featured 10/100 MAC supports TCP/IP hardware checksum verification and uses

DMA hardware acceleration to improve throughput. It includes RMII and MII interfaces and an

external transceiver, and enables low energy consumption with power management features for

remote wake-up frame and magic packet detection.

Quad SPI Flash interface (SPIFI)

SPIFI is a patent-pending interface that lets you take full advantage of small, inexpensive serial

Flash memories, including Quad SPI Flash. It lets external memory appear in the MCU’s memory

map, so it can be read like other on-chip memory. That means you can use a standard MCU and

cost-effective serial Flash to produce high speeds, save board space, and lower system cost.

LCD display interface

Our optimized LCD display interface drives a wide range of displays without loading the CPU.

It provides all the necessary control signals to interface directly with a variety of color and

monochrome LCD panels with up to 1024 x 768 pixels, supports hardware cursor for single-

panel displays, and offers programmable timing options for different display panels.

Serial GPIO (SGPIO)

Combining general-purpose I/O with a timer/shift register, our SGPIO can be used to create or

capture multiple real-time serial data streams. There’s no need for code loops that manipulate

GPIO in real time, or CPU-intensive “bit banging”. For added convenience, SGPIO can also be

configured as extra serial interfaces (UART, I2S, I2C, etc.).

Dual-core (M4/M0) architecture

The LPC4300 series is the first to combine a Cortex-M4 with a Cortex-M0. Having two cores

on one chip lets you separate the processing and real-time control functions while minimizing

PCB space. The M0 core can handle the I/O processing and all the communications functions,

including USB and Ethernet, so the M4 core can focus on executing high-performance

algorithms.

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