LH28F800BJHE-PTTL90 Ver la hoja de datos (PDF) - Sharp Electronics

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Fabricante

LH28F800BJHE-PTTL90

8M (x8/x16) Flash Memory

Sharp Electronics 

LHF80J03

11

Table 3. Command Definitions(10)

Command

Bus Cycles

Req’d. Notes

First Bus Cycle

Oper(1) Addr(2) Data(3)

Second Bus Cycle

Oper(1) Addr(2) Data(3)

Read Array/Reset

1

Write

X

FFH

Read Identifier Codes

≥2

4

Write

X

90H

Read

IA

ID

Read Status Register

2

Write

X

70H

Read

X

SRD

Clear Status Register

1

Write

X

50H

Block Erase

2

5

Write

X

20H

Write

BA

D0H

Full Chip Erase

2

Write

X

30H

Write

X

D0H

Word/Byte Write

2

5,6

Write

X

40H or

10H

Write

WA

WD

Block Erase and Word/Byte

Write Suspend

1

5

Write

X

B0H

Block Erase and Word/Byte

Write Resume

1

5

Write

X

D0H

Set Block Lock-Bit

2

8

Write

X

60H

Write

BA

01H

Clear Block Lock-Bits

2

7,8

Write

X

60H

Write

X

D0H

Set Permanent Lock-Bit

2

9

Write

X

60H

Write

X

F1H

OTP Program

2

Write

X

C0H Write

OA

OD

NOTES:

1. BUS operations are defined in Table 2.1 and Table 2.2.

2. X=Any valid address within the device.

IA=Identifier Code Address: see Figure 4.

BA=Address within the block being erased or locked.

WA=Address of memory location to be written.

OA=Address of OTP block to be written: see Figure 5.

3. ID=Data read from identifier codes.

SRD=Data read from status register. See Table 6 for a description of the status register bits.

WD=Data to be written at location WA. Data is latched on the rising edge of WE# or CE# (whichever goes high first).

OD=Data to be written at location OA. Data is latched on the rising edge of WE# or CE# (whichever goes high first).

4. Following the Read Identifier Codes command, read operations access manufacturer, device, block lock configuration and

permanent lock configuration codes. See Section 4.2 for read identifier code data.

5. If WP# is VIL, boot blocks are locked without block lock-bits state. If WP# is VIH, boot blocks are locked by block lock-

bits. The parameter and main blocks are locked by block lock-bits without WP# state.

6. Either 40H or 10H are recognized by the WSM as the word/byte write setup.

7. The clear block lock-bits operation simultaneously clears all block lock-bits.

8. If the permanent lock-bit is set, Set Block Lock-Bit and Clear Block Lock-Bits commands can not be done.

9. Once the permanent lock-bit is set, permanent lock-bit reset is unable.

10. Commands other than those shown above are reserved by SHARP for future device implementations and should not be

used.

Rev. 1.27

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