Pin connection
2
Pin connection
L6393
Figure 2. Pin connection (top view)
0(!3%
3$
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6##
$4
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(6'
/54
. #
,6'
#0
#0
!-V
Table 2.
Pin N#
Pin description
Pin name
Type
Function
1
PHASE
2
SD (1)
3
BRAKE
4
VCC
5
DT
6
CPOUT
7
GND
8
CP-
9
CP+
10
LVG (1)
11
NC
12
OUT
13
HVG (1)
14
BOOT
I
Driver logic input (active high)
I
Shut down input (active low)
I
Driver logic input (active low)
P
Lower section supply voltage
I
Dead time setting
O
Comparator output (open drain)
P
Ground
I
Comparator negative input
I
Comparator positive input
O
Low side driver output
Not connected
P
High side (floating) common voltage
O
High side driver output
P
Bootstrapped supply voltage
1. The circuit provides less than 1 V on the LVG and HVG pins (@ Isink = 10 mA), with VCC > 3 V. This
allows omitting the “bleeder” resistor connected between the gate and the source of the external MOSFET
normally used to hold the pin low; the gate driver assures low impedance also in SD condition.
4/19
Doc ID 14497 Rev 4