SAA7206 Ver la hoja de datos (PDF) - Philips Electronics
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SAA7206 Datasheet PDF : 52 Pages
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Philips Semiconductors
DVB compliant descrambler
Product specification
SAA7206H
If the payload of a packet is descrambled, the descrambler
subsequently resets the scrambling_control bits in the TS
or PES header (to ‘00’). For each of the 6 PIDs in the PID
filter bank the values of the TS scrambling_control bits are
stored in a microcontroller accessible register, prior to
descrambling [bits: ‘ts_sc_PIDi1’ and ‘ts_sc_PIDi0’;
(see Table 10, address 0x0208), ‘i’ is in the range 5 to 0].
For each of the 6 PIDs in the PID filter bank, of which the
corresponding PIDi_is_pes bit (see Table 10,
address 0x0206) is also set to logic 1, the values of the
PES scrambling_control bits are stored in a
microcontroller accessible register, prior to descrambling
[bits:‘pes_sc_PIDi1’ and ‘pes_sc_PIDi0’ (see Table 10,
address 0x0208) ‘i’ is in the range 5 to 0]. TS and PES
scrambling_control retrieval is independent of the value of
the CWPI.
Table 2 Definition of the bits in the PES
scrambling_control field
VALUE
00
01
10
11
DESCRIPTION
data is not scrambled
data is not scrambled
data is scrambled with the EVEN control
word
data is scrambled with the ODD control
word
Remark: The payloads of packets with TS
scrambling_control bits equal to ‘01’ are descrambled
using the default control word, regardless of their PID
and/or CWPI values. Thus, even PIDs which are not
programmed in the PID filter bank are descrambled with
the DCW should transport_scrambling_control = ‘01’.
For PIDs in the PID filter bank, if
transport_scrambling_control = ‘01’, the payload is
descrambled with the default control word, regardless of
the value of the associated CWPI. If the default CW is
invalid however [‘DCW_valid’ = 0 (see Table 10,
address 0x0206)], DCW based descrambling is disabled.
Descrambling using the DCW is only possible on TS
packet level.
The control word bank contains storage space for 6 control
word pairs and a default control word. A control word pair
consists of 2 CWs and an odd and even CW, as indicated
in Table 4. A control word contains 64 bits. In conjunction
with the control word selection mechanism given in
Table 4, the CW bank allows any CW pair to be used with
any PID. All PIDs may, therefore, use their own specific
CW pair, but all of them may also share one CW pair.
The super descrambler algorithm is implemented in the
core of the descrambler. Descrambling is performed on
the payload of a transport packet or a PES. The transport
header, the (optional) adaptation field and the PES header
are excepted.
Table 3 Definition of the bits in the TS
scrambling_control field
VALUE
00
01
10
11
DESCRIPTION
data is not scrambled
data is scrambled with the default control
word
data is scrambled with the EVEN control
word
data is scrambled with the ODD control
word
1996 Oct 09
13
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