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ISP1583BS Datasheet PDF : 87 Pages
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Philips Semiconductors
ISP1583
Hi-Speed USB peripheral controller
8. Functional description
The ISP1583 is a high-speed USB peripheral controller. It implements the Hi-Speed
USB or the Original USB physical layer and the packet protocol layer. It maintains up
to 16 USB endpoints concurrently (control IN and control OUT, 7 IN and 7 OUT
configurable) along with endpoint EP0 setup, which accesses the setup buffer. The
USB Chapter 9 protocol handling is executed by means of external firmware.
The ISP1583 has a fast general-purpose interface for communication with most types
of microcontrollers and microprocessors. This microcontroller interface is configured
by pins BUS_CONF, MODE1 and MODE0 to accommodate most interface types. Two
bus configurations are available, selected via input BUS_CONF during power-up:
Generic processor mode (pin BUS_CONF = HIGH):
AD[7:0]: 8-bit address bus (selects target register)
DATA[15:0]: 16-bit data bus (shared by processor and DMA)
Control signals: RW_N and DS_N or RD_N and WR_N (selected via pin
MODE0), CS_N
DMA interface (generic slave mode only): Uses lines DATA[15:0] as data bus,
DIOR and DIOW as dedicated read and write strobes.
Split bus mode (pin BUS_CONF = LOW):
AD[7:0]: 8-bit local microprocessor bus (multiplexed address and data)
DATA[15:0]: 16-bit DMA data bus
Control signals: CS_N, ALE or A0 (selected via pin MODE1), RW_N and DS_N
or RD_N and WR_N (selected via pin MODE0)
DMA interface (master or slave mode): Uses DIOR and DIOW as dedicated
read and write strobes.
For high-bandwidth data transfer, the integrated DMA handler can be invoked to
transfer data to or from external memory or devices. The DMA interface can be
configured by writing to the proper DMA registers (see Section 9.4).
The ISP1583 supports Hi-Speed USB and Original USB signaling. The USB
signaling speed is automatically detected.
The ISP1583 has 8 kbytes of internal FIFO memory, which is shared among the
enabled USB endpoints
There are 7 IN endpoints, 7 OUT endpoints and 2 control endpoints that are a fixed
64 bytes long. Any of the 7 IN and 7 OUT endpoints can be separately enabled or
disabled. The endpoint type (interrupt, isochronous or bulk) and packet size of these
endpoints can be individually configured depending on the requirements of the
application. Optional double buffering increases the data throughput of these data
endpoints.
The ISP1583 requires 3.3 V power supply. It has 5 V tolerant I/O pads when
operating at VCC(I/O) = 3.3 V and an internal 1.8 V regulator for powering the analog
transceiver. The I/O voltage can range from 1.65 V to 3.6 V.
9397 750 13461
Product data
Rev. 03 — 12 July 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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