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ISL97631 Datasheet PDF : 8 Pages
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ISL97631
The magnitude of the PWM signal should be higher than the
minimum ENAB voltage high. The bench PWM dimming test
results are shown in Figure 8. In the test, two PWM
frequencies 400Hz and 1kHz are chosen to compare the
linear dimming range. It is clear that there is a wider linear
dimming range for the lower PWM frequency than for the
higher one, due to the self discharge of the output capacitor
through the LEDs during the low ENAB periods. To achieve
a better linearity with high frequencies an NMOS FET can be
placed between the FB pin and the LED stack, with its gate
driven by the same signal as ENAB. This acts to prevent self
discharge of the output capacitor during the off periods. In
the PWM dimming test, the output capacitor is 0.22µF.
20
18
16
14
12
10
8
6
4
2
0
0
1kHz
400Hz
20
40
60
80
100
DUTY-CYCLE (%)
FIGURE 8. PWM DIMMING LINEAR RANGE (FOR 400Hz AND
1kHz PWM FREQUENCIES CONDITION,
COUT = 0.22µF)
ANALOG DIMMING
The second dimming method applies a variable DC voltage
(VDim) at FB pin (see Figure 9) to adjust the LED current. As
the DC dimming signal voltage increases above VFB, the
voltages drop on R1 and R2 increase and the voltage drop
on RSET decreases. Thus, the LED current decreases.
ILED
=
V-----F---B-----⋅---(---R----1-----+-----R----2----)---–-----V----D----i--m-----⋅---R-----1-
R2
⋅
R
S
E
T
(EQ. 3)
The DC dimming signal voltage can be a variable DC voltage
or a DC voltage generated by filtering a high frequency PWM
control signal.
As brightness is directly proportional to LED currents, VDim
may be calculated for any desired “relative brightness” (F)
using Equation 4.
VDim
=
R-----2-
R1
⋅
VFB
⋅
1
+
R-----1-
R2
–
F
(EQ. 4)
Where F = ILED (dimmed)/ILED (undimmed).
These equations are valid for values of R1 and R2 such that
both R1>>RSET and R2>>RSET.
VIN
2.7V~5.5V
C1
1µF
OFF/ON
L1
22µH
VIN
LX
VOUT
ISL97631
ENAB FB
GND
R2
LEDs
R1
3.3k
C2
0.22µF
RSET
4.75Ω
VDim
FIGURE 9. ANALOG DIMMING CONTROL APPLICATION
CIRCUIT
The analog dimming circuit can be tailored to a desired
relative brightness for different VDim ranges using
Equation 5.
R2 = -[--(--V-----D[--V--i-m-F----B_---m--•--a--(-x--1---–--–--V--F--F--m--B---i-)n---•-)--]--R----1----]
(EQ. 5)
Where VDim_max is the maximum VDim voltage and Fmin is
the minimum relative brightness (i.e., the brightness with
VDim_max applied).
i.e., VDim_max = 5V, Fmin = 10% (i.e., 0.1), R2 = 189k
i.e., VDim_max = 1V, Fmin = 10% (i.e., 0.1), R2 = 35k
Open-Voltage Protection
In some applications, it is possible that the output is
opened, e.g. when the LEDs are disconnected from the
circuit or the LEDs fail. In this case the feedback voltage
will be zero. The ISL97631 will then switch to a high duty
cycle resulting in a high output voltage, which may cause
the LX pin voltage to exceed its maximum 27V rating. To
implement overvoltage protection, a zener diode Dz and a
resistor R1 can be used at the output and FB pin to limit the
voltage on the LX pin as shown in Figure 10. It is clear that
as the zener is turned on, due to the overvoltage, the zener
diode’s current will set up a voltage on R1 and RSET and this
voltage is applied on FB pin as the feedback node. This
feedback will prevent the output from reaching the
overvoltage condition. In the overvoltage protection circuit
design, the zener voltage should be larger than the
maximum forward voltage of the LED string.
5
FN7370.1
December 21, 2005
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