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IS25LQ080-JBA1

8 Mbit Single Operating Voltage Serial Flash Memory With 104 MHz Dual- or 100MHz Quad-Output SPI Bus Interface

Integrated Silicon Solution 

DEVICE OPERATION (CONTINUED)

IS25LQ080

FAST_READ COMMAND (FAST READ DATA) OPERATION

The FAST_READ instruction is used to read memory

data at up to a 104 MHz clock.

The FAST_READ instruction code is followed by three

address bytes (A23 - A0) and a dummy byte (8 clocks),

transmitted via the SI line, with each bit latched-in

during the rising edge of SCK. Then the first data byte

addressed is shifted out on the SO line, with each bit

shifted out at a maximum frequency fCT, during the

falling edge of SCK.

The first byte addressed can be at any memory

location. The address is automatically incremented

after each byte of data is shifted out. When the highest

address is reached, the address counter will roll over to

the 000000h address, allowing the entire memory to be

read with a single FAST_READ instruction. The

FAST_READ instruction is terminated by driving CE#

high (VIH). If a Fast Read Data instruction is issued while

an Erase, Program or Write cycle is in process (BUSY=1)

the instruction is ignored and will not have any effects on

the current cycle

Figure 13. Fast Read Data Sequence

SIO

Integrated Silicon Solution, Inc.- www.issi.com

Rev. A

10/18/2012

19

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