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MH64S72VJG Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC

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MH64S72VJG Datasheet PDF : 57 Pages
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Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH64S72VJG-5,-6
4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
FUNCTION TRUTH TABLE(continued)
Current State
RE-
FRESHING
MODE
REGISTER
SETTING
/S /RAS /CAS /WE Address
Command
Action
H
X
X
XX
DESEL NOP(Idle after tRC)
L
H
H
HX
NOP
NOP(Idle after tRC)
L
H
H
L BA
TBST
ILLEGAL
L
H
L
X BA,CA,A10 READ/WRITE ILLEGAL
L
L
H
H BA,RA
ACT
ILLEGAL
L
L
H
L BA,A10
PRE/PREA ILLEGAL
L
L
L
HX
REFA
ILLEGAL
Op-Code,
L
L
L
L
Mode-Add
MRS
ILLEGAL
H
X
X
XX
DESEL NOP(Idle after tRSC)
L
H
H
HX
NOP
NOP(Idle after tRSC)
L
H
H
L BA
TBST
ILLEGAL
L
H
L
X BA,CA,A10 READ/WRITE ILLEGAL
L
L
H
H BA,RA
ACT
ILLEGAL
L
L
H
L BA,A10
PRE/PREA ILLEGAL
L
L
L
HX
REFA
ILLEGAL
Op-Code,
L
L
L
L
Mode-Add
MRS
ILLEGAL
ABBREVIATIONS:
H = Hige Level, L = Low Level, X = Don't Care
BA = Bank Address, RA = Row Address, CA = Column Address, NOP = No Operation
NOTES:
1. All entries assume that CKE was High during the preceding clock cycle and the current
clock cycle.
2. ILLEGAL to bank in specified state; function may be legal in the bank indicated by BA,
depending on the state of that bank.
3. Must satisfy bus contention, bus turn around, write recovery requirements .
4. NOP to bank precharging or in idle state.May precharge bank indicated by BA.
5. ILLEGAL if any bank is not idle.
ILLEGAL = Device operation and / or date-integrity are not guaranteed.
MIT-DS-0385-0.1
MITSUBISHI
ELECTRIC
27.Feb.2001 10

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