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IDT49C465APQFB

32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT

Integrated Device Technology 

IDT49C465/A

32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT

MILITARY AND COMMERCIAL TEMPERATURE RANGES

32-BIT DATA WORD CONFIGURATION

A single IDT49C465 EDC unit, connected as shown below,

provides all the logic needed for single-bit error correction,

and double-bit error detection, of a 32-bit data field. The

identification code (00) indicates 7 checkbits are required.

The CBI7 pin should be tied high.

The 39-bit data format for four bytes of data and 7 checkbits

is indicated below.

Syndrome bits are generated by an exclusive-OR of the

generated checkbits with the checkbits read from memory.

For example, Sn is the XOR of checkbits from those read with

those generated. During Data Correction, the syndrome bits

are used to complement (correct) single-bit errors in the data

bits.

32-BIT DATA FORMAT

BYTE 3

DATA

BYTE 2

BYTE 1

BYTE 0

31

24 23

16 15

87

0

CHECKBITS

C6 C5 C4 C3 C2 C1 C0

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32-BIT HARDWARE CONFIGURATION

VCC

8

PCBI0–7

CBI7

CBI0–6

CHECKBITS–IN

7

SYSTEM DATA I/O

P0–3

SD0–31

32

CBO0–6

7

SYO0–6

7

ERR

MERR

MD0–31

32

CODE ID 1,0 = 00

IDT49C465

CHECKBITS–OUT

SYNDROME–OUT

MEMORY DATA I/O

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11.7

13

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