HT49R10A-1(2007) Ver la hoja de datos (PDF) - Holtek Semiconductor
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HT49R10A-1 Datasheet PDF : 38 Pages
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HT49R10A-1/HT49C10-1
Oscillator Configuration
The device provides three oscillator circuits for system
clocks, i.e., RC oscillator, crystal oscillator and 32768Hz
crystal oscillator, determined by configuration options. No
matter what type of oscillator is selected, the signal is
used for the system clock. The HALT mode stops the sys-
tem oscillator (RC and crystal oscillator only) and ignores
external signals to conserve power. The 32768Hz crystal
oscillator (system oscillator) still runs when in the HALT
mode. If the 32768Hz crystal oscillator is selected as the
system oscillator, the system oscillator is not stopped; but
the instruction execution is stopped. Since the 32768Hz
oscillator is also designed for timing purposes, the inter-
nal timing (RTC, time base, WDT) operation still runs
even if the system enters the HALT mode.
Of the three oscillators, if the RC oscillator is used, an
external resistor between OSC1 and VSS is required,
and the range of the resistance should be from 24kW to
1MW. The system clock, divided by 4, is available on
OSC2 with a pull-high resistor, which can be used to
synchronize external logic. The RC oscillator provides
the most cost effective solution. However, the frequency
of the oscillation may vary with VDD, temperature, and
the chip itself due to process variations. It is therefore,
not suitable for timing sensitive operations where accu-
rate oscillator frequency is desired.
If the crystal oscillator is selected, a crystal across
OSC1 and OSC2 is needed to provide the feedback and
phase shift required for the oscillator, and no other ex-
ternal components are required. A resonator may be
connected between OSC1 and OSC2 to replace the
crystal and to get a frequency reference, but two exter-
nal capacitors on OSC1 and OSC2 are required.
There is another oscillator circuit designed for the real
time clock. In this case, only the 32.768kHz crystal oscil-
lator can be applied. The crystal should be connected
between OSC3 and OSC4.
The RTC oscillator circuit can be controlled to start up
quickly by setting the ²QOSC² bit (bit 4 of RTCC). It is
recommended to turn on the quick oscillating function
upon power on, and then turn it off after 2 seconds.
The WDT oscillator is a free running on-chip RC oscilla-
tor, and no external components are required. Although
the system enters the power down mode, the system
clock stops, and the WDT oscillator still works with a pe-
riod of approximately 65ms at 5V. The WDT oscillator
can be disabled by configuration options to conserve
power.
Watchdog Timer - WDT
The WDT clock source is implemented by a dedicated RC
oscillator (WDT oscillator) or an instruction clock (system
clock/4) or a real time clock oscillator (RTC oscillator). The
timer is designed to prevent a software malfunction or se-
quence from jumping to an unknown location with unpre-
dictable results. The WDT can be disabled by
configuration options. But if the WDT is disabled, all exe-
cutions related to the WDT lead to no operation.
The WDT time-out period is fS/215~fS/216. If the WDT
clock source chooses the internal WDT oscillator, the
time-out period may vary with temperature, VDD, and
process variations. If the clock source selects the instruc-
tion clock and the ²HALT² instruction is executed, the
WDT may stop counting and lose its protecting purpose,
and the logic can only be restarted by external logic.
When the device operates in a noisy environment, using
the on-chip RC oscillator (WDT OSC) is strongly recom-
mended, since the HALT instruction will stop the system
clock.
The WDT overflow under normal operation initializes a
²chip reset² and sets the status bit ²TO². In the HALT
mode, the overflow initializes a ²warm reset², and only
the program counter and stack pointer are reset to zero.
To clear the contents of the WDT, there are three meth-
ods to be adopted, i.e., external reset (a low level to
RES), software instruction, and a ²HALT² instruction.
There are two types of software instructions; ²CLR
WDT² and the other set - ²CLR WDT1² and ²CLR
WDT2². Of these two types of instruction, only one type
of instruction can be active at a time depending on the
options - ²CLR WDT² times selection option. If the ²CLR
WDT² is selected (i.e., CLR WDT times equal one), any
execution of the ²CLR WDT² instruction clears the WDT.
In the case that ²CLR WDT1² and ²CLR WDT2² are cho-
sen (i.e., CLR WDT times equal two), these two instruc-
tions have to be executed to clear the WDT; otherwise,
the WDT may reset the chip due to a time-out.
VDD
O SC3
O SC1
470pF
V DD
O SC1
Rev. 1.20
O SC4
3 2 7 6 8 H z C r y s ta l/
R T C O s c illa to r
O SC2
C r y s ta l O s c illa to r
System Oscillator
11
fS Y S /4
O SC2
R C O s c illa to r
July 27, 2007
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