HT46R006 Ver la hoja de datos (PDF) - Holtek Semiconductor
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HT46R006 Datasheet PDF : 72 Pages
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HT48R006/HT46R006
· CTRL0 Register -- HT48R006
Bit
7
6
5
4
3
2
1
0
Name
¾
¾
¾
¾
BZEN1 BZEN0 LXTLP CLKMOD
R/W
¾
¾
¾
¾
R/W
R/W
R/W
R/W
POR
¾
¾
¾
¾
0
0
0
0
Bit 7~4
Bit 3~2
Bit 1
Bit 0
unimplemented, read as ²0²
BZEN1,BZEN0: BZ/BZ enable/disable
00: both disabled
01: reserved
10: BZ only enabled
11: BZ and BZ enabled
When BZ or BZ is disabled, the I/O port will have general I/O functions. If enabled, the BZ or BZ
outputs will still be controlled by the related I/O port control and data settings. Refer to the Buzzer
function section for details.
LXTLP: LXT oscillator low power control function
0: LXT oscillator quick start-up mode
1: LXT oscillator low power mode
CLKMOD: system clock mode selection.
0: high speed - HIRC used as system clock
1: low speed - LXT used as system clock, HIRC oscillator stopped.
These selections are only valid if the oscillator configuration options
have selected the HIRC+LXT.
· CTRL1 Register
Bit
Name
R/W
POR
7
INTEG1
R/W
1
6
INTEG0
R/W
0
5
TBSEL1
R/W
0
4
TBSEL0
R/W
0
3
WDTEN3
R/W
1
2
WDTEN2
R/W
0
1
WDTEN1
R/W
1
0
WDTEN0
R/W
0
Bit 7, 6
Bit 5, 4
Bit 3~0
Note:
INTEG1, INTEG0: External interrupt edge type
00: disable
01: rising edge trigger
10: falling edge trigger
11: dual edge trigger
TBSEL1, TBSEL0: Time base period selection
00: 210 ´ (1/fTP)
01: 211 ´ (1/fTP)
10: 212 ´ (1/fTP)
11: 213 ´ (1/fTP)
WDTEN3, WDTEN2, WDTEN1, WDTEN0: WDT function enable
1010: WDT disabled
Other values: WDT enabled - Recommended value is 0101
If the ²watchdog timer enable² configuration option is selected, then the watchdog timer will
always be enabled and the WDTEN3~WDTEN0 control bits will have no effect.
The WDT is only disabled when both the WDT configuration option is disabled and when bits
WDTEN3~WDTEN0=1010.
The WDT is enabled when either the WDT configuration option is enabled or when bits
WDTEN3~WDTEN0¹1010.
Rev. 1.00
21
October 24, 2011
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