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HEF4516BT,652 Datasheet PDF : 16 Pages
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NXP Semiconductors
HEF4516B
Binary up/down counter
Table 7. Dynamic characteristics …continued
VSS = 0 V; Tamb = 25 °C; for test circuit see Figure 8; unless otherwise specified.
Symbol Parameter
Conditions
VDD
Extrapolation formula
tt
transition time
5 V [1] 10 ns + (1.00 ns/pF)CL
10 V
9 ns + (0.42 ns/pF)CL
15 V
6 ns + (0.28 ns/pF)CL
fmax
maximum frequency see Figure 6
5V
10 V
15 V
tW
pulse width
CP input LOW;
minimum width;
see Figure 6
5V
10 V
15 V
PL input HIGH;
minimum width;
see Figure 7
5V
10 V
15 V
MR input HIGH;
minimum width;
see Figure 7
5V
10 V
15 V
trec
recovery time
MR input;
see Figure 7
5V
10 V
15 V
PL input;
see Figure 7
5V
10 V
15 V
tsu
set-up time
Dn to PL;
see Figure 7
5V
10 V
15 V
UP/DN to CP;
see Figure 6
5V
10 V
15 V
CE to CP;
see Figure 6
5V
10 V
15 V
th
hold time
Dn to PL;
see Figure 7
5V
10 V
15 V
UP/DN to CP;
see Figure 6
5V
10 V
15 V
CE to CP;
see Figure 6
5V
10 V
15 V
Min Typ Max Unit
-
60 120 ns
-
30 60 ns
-
20 40 ns
3
6-
MHz
7 14 -
MHz
9 18 -
MHz
95 45 -
ns
35 20 -
ns
25 15 -
ns
105 55 -
ns
45 25 -
ns
35 15 -
ns
120 60 -
ns
50 25 -
ns
40 20 -
ns
130 65 -
ns
45 20 -
ns
30 15 -
ns
150 75 -
ns
50 25 -
ns
30 15 -
ns
100 50 -
ns
50 25 -
ns
40 20 -
ns
250 125 -
ns
100 50 -
ns
75 35 -
ns
120 60 -
ns
40 20 -
ns
25 10 -
ns
+10 −40 -
ns
+5 −20 -
ns
0 −20 -
ns
+35 −90 -
ns
+15 −35 -
ns
+15 −25 -
ns
+20 −40 -
ns
+5 −15 -
ns
+5 −10 -
ns
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
HEF4516B_6
Product data sheet
Rev. 06 — 11 December 2009
© NXP B.V. 2009. All rights reserved.
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