HDSP-2107 Ver la hoja de datos (PDF) - Avago Technologies
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Fabricante
HDSP-2107 Datasheet PDF : 16 Pages
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Optical Characteristics at 25°C[1]
VDD = 5.0 V at Full Brightness
Part
Description
Number
AlGaAs
HDSP-2107
-2504
HER
HDSP-2112
-2502
Orange
HDSP-2110
-2500
Yellow
HDSP-2111
-2501
High Performance
HDSP-2113
Green -2503
Luminous Intensity
Character Average (#)
Iv (mcd)
Min.
Typ.
5.0
15.0
2.5
7.5
2.5
7.5
2.5
7.5
2.5
7.5
Note:
1. Refers to the initial case temperature of the device immediately prior to measurement.
Peak
Wavelength
lPeak
(nm)
645
635
600
583
568
Dominant
Wavelength
ld
(nm)
637
626
602
585
574
AC Timing Characteristics Over Temperature Range (-45°C to +85°C)
4.5 V < VDD < 5.5 V, unless otherwise specified
Reference
Number
Symbol
Description
Min.[1]
Units
1
tACC
Display Access Time
Write
Read
210
230
ns
2
tACS
Address Setup Time to Chip Enable
3
tCE
Chip Enable Active Time[2,3]
Write
Read
10
ns
140
160
ns
4
tACH
Address Hold Time to Chip Enable
20
ns
5
tCER
Chip Enable Recovery Time
60
ns
6
tCES
Chip Enable Active Prior to Rising Edge of[2,3]
Write
140
Read
160
ns
7
tCEH
Chip Enable Hold Time to Rising Edge of
Read/Write Signal[2,3]
0
ns
8
tW
Write Active Time
100
ns
9
tWSU
Data Write Setup Time
50
ns
10
tWH
Data Write Hold Time
20
ns
11
tR
Chip Enable Active Prior to Valid Data
160
ns
12
tRD
Read Active Prior to Valid Data
75
ns
13
tDF
Read Data Float Delay
tRC
Reset Active Time[4]
10
ns
300
ns
Notes:
1. Worst case values occur at an IC junction temperature of 150°C.
2. For designers who do not need to read from the display, the Read line can be tied to VDD and the Write and Chip Enable lines can be tied to-
gether.
3. Changing the logic levels of the Address lines when CE = “0” may cause erroneous data to be entered into the Character RAM, regardless of
the logic levels of the WR and RD lines.
4. The display must not be accessed until after 3 clock pulses (110 µs min. using the internal refresh clock) after the rising edge of the reset line.
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