HB28H016/D032/B064/B128MM2
Identifier
Included
in resp Type Value
Description
Clear
condition
Illegal command R1 R2 E R ’0’= no error
’1’= error
Command not legal for the card state C
Card ECC failed R2
EX
DataErr
’0’= success
’1’= failure
Card internal ECC was applied but C
failed to correct the data.
CC error
R2
E R X ’0’= no error
Internal card controller error
C
DataErr
’1’= error
Error
R2
E R X ’0’= no error
A general or an unknown error
C
DataErr
’1’= error
occurred during the operation.
WP erase skip R2
S X ’0’= not protected Only partial address space was
C
’1’= protected
erased due to existing write protect
blocks.
Lock/Unlock
R2
command failed
E X ’0’= no error
’1’= error
Sequence or password error during C
card lock/unlock operation
Card is locked R2
S X ’0’= card is not Card is locked by password.
A
DataErr
locked
’1’= card is locked
Erase reset
R1 R2 S R ’0’= cleared
’1’= set
An erase sequence was cleared
C
before executing because an output
of erase sequence command was
received.
In Idle state
R1 R2 S R ’0’= Card is ready The card enters the Idle state after A
’1’= Card is in Idle power up or reset command. It will
state
exit this state and become ready upon
completion of this initialization
procedures.
CSD overwrite R2
E X ’0’= no error
’1’= error
The host is trying to change the ROM C
section, or is trying to reverse the
copy bit (set as original) or permanent
WP bit (unprotected) or he CSD
register.
Rev.5.0, Jan. 2003, page 69 of 88