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LT1959 Datasheet PDF : 24 Pages
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LT1959
APPLICATIONS INFORMATION
GMP = Transconductance of power stage = 5.3A/V
GMA = Error amplifier transconductance = 2(10–3)
ESR = Output capacitor ESR
1.21 = Reference voltage
With VOUT = 5V and ESR = 0.03, a value of 6.5k for RC
would yield zero gain margin, so this represents an upper
limit. There is a second limitation however which has
nothing to do with theoretical small signal dynamics. This
resistor sets high frequency gain of the error amplifier,
including the gain at the switching frequency. If switching
frequency gain is high enough, output ripple voltage will
appear at the VC pin with enough amplitude to muck up
proper operation of the regulator. In the marginal case,
subharmonic switching occurs, as evidenced by alternat-
ing pulse widths seen at the switch node. In more severe
cases, the regulator squeals or hisses audibly even though
the output voltage is still roughly correct. None of this will
show on a theoretical Bode plot because Bode is an
amplitude insensitive analysis. Tests have shown that if
ripple voltage on the VC is held to less than 100mVP-P, the
LT1959 will be well behaved. The formula below will give
an estimate of VC ripple voltage when RC is added to the
loop, assuming that RC is large compared to the reactance
of CC at 500kHz.
( )( )( )( )( ) RC GMA VIN VOUT ESR 1.21
( ) VC RIPPLE =
(VIN)(L)(f)
GMA = Error amplifier transconductance (2000µMho)
If a computer simulation of the LT1959 showed that a
series compensation resistor of 6k gave best overall loop
response, with adequate gain margin, the resulting VC pin
ripple voltage with VIN = 10V, VOUT = 5V, ESR = 0.1,
L = 10µH, would be:
( ) ( ) ( )( )( ) 6k 2•103 10 5 0.1 1.21
( )( )( ) ( ) VC RIPPLE = 10 10 •106 500 •103
= 0.144V
This ripple voltage is high enough to possibly create
subharmonic switching. In most situations a compromise
value (< 2k in this case) for the resistor gives acceptable
phase margin and no subharmonic problems. In other
cases, the resistor may have to be larger to get acceptable
phase response, and some means must be used to control
ripple voltage at the VC pin. The suggested way to do this
is to add a capacitor (CF) in parallel with the RC/CC network
on the VC pin. Pole frequency for this capacitor is typically
set at one-fifth of switching frequency so that it provides
significant attenuation of switching ripple, but does not
add unacceptable phase shift at loop unity-gain frequency.
With RC = 6k,
( )( )( ) ( )( ) CF =
2π
5
f RC
=
5
2π 500 × 103
6k
= 275pF
How Do I Test Loop Stability?
The “standard” compensation for LT1959 is a 1.5nF
capacitor for CC, with RC = 0. While this compensation will
work for most applications, the “optimum” value for loop
compensation components depends, to various extent, on
parameters which are not well controlled. These include
inductor value (±30% due to production tolerance, load
current and ripple current variations), output capacitance
(±20% to ±50% due to production tolerance, tempera-
ture, aging and changes at the load), output capacitor ESR
(±200% due to production tolerance, temperature and
aging), and finally, DC input voltage and output load
current . This makes it important for the designer to check
out the final design to ensure that it is “robust” and tolerant
of all these variations.
I check switching regulator loop stability by pulse loading
the regulator output while observing transient response at
the output, using the circuit shown in Figure 13. The
regulator loop is “hit” with a small transient AC load
current at a relatively low frequency, 50Hz to 1kHz. This
causes the output to jump a few millivolts, then settle back
to the original value, as shown in Figure 14. A well behaved
loop will settle back cleanly, whereas a loop with poor
phase or gain margin will “ring” as it settles. The number
of rings indicates the degree of stability, and the frequency
of the ringing shows the approximate unity-gain fre-
quency of the loop. Amplitude of the signal is not particu-
larly important, as long as the amplitude is not so high that
the loop behaves nonlinearly.
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