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7217 Ver la hoja de datos (PDF) - Intersil

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componentes Descripción
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7217 Datasheet PDF : 20 Pages
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ICM7217
When using the circuit as a programmable divider by n
with equal outputs) a short time delay (about 1µs) is needed
from the EQUAL output to the RESET input to establish a
pulse of adequate duration. (See Figure 16).
When the circuit is configured to reload the counter or regis-
ter with a new value from the BCD lines (upon reaching
EQUAL), loading time will be digit “on” time multiplied by
four. If this load time is longer than one period of the input
count, a count can be lost. Since the circuit will retain data in
the register, the register need only be updated when a new
value is to be entered. RESET will not clear the register.
N.O.
0.047µF
10
VDD
10k
RESET INPUT
ICM7217
5k
VSS
FIGURE 15. POWER ON RESET
EQUAL
VDD
47pF
33K
RESET
FIGURE 16. EQUAL TO RESET DELAY
Test Circuit
COMMON ANODE DISPLAY
a
f
b
g
e
c
d
D4
a
f
b
g
e
c
d
D3
a
f
b
g
e
c
d
D2
c
a
a
f
bd
g
f
e
ce
d
b
D1
g
THUMBWHEEL SWITCHES
BCD I/O 8s
BCD I/O 4s
BCD I/O 2s
BCD I/O 1s
COUNT INPUT
D4 D3 D2 D1
9999
VDD
+5V
CARRY
1
28
ZERO
2
27
EQUAL
3
26
4
25
5
24
6
23
7
ICM7217
22
8
ICM7217B
21
STORE
9
20
UP/DOWN
10
19
LOAD REGISTER
11
18
LOAD COUNTER
12
17
SCAN
13
16
RESET
14
15
N.O.
VDD
VSS
DISPLAY
CONTROL
12

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