PEB 2466
Functional Description
2
Functional Description
2.1 SICOFI®-4-µC Principles
The change from 2 µm to 1 µm CMOS process requires new concepts in the realization
of the analog functions. High performance (in the terms of gain, speed, stability …) 1 µm
CMOS devices cannot withstand more than 5.5 V of supply-voltage. On that account the
negative supply voltage VSS of the previous SICOFIs is omitted. This is a benefit for the
user but it makes a very high demand on the analog circuitry.
ADC and DAC are changed to Sigma-Delta-concepts to fulfill the stringent requirements
on the dynamic parameters.
Using 1 µm CMOS does not only lead to problems - it is the only acceptable solution in
terms of area and power consumption for the integration of more than two SICOFI
channels on a single chip.
It is rather pointless to implement 4 codec-filter-channels on one chip with pure analog
circuitry. The use of a DSP-concept (the SICOFI and the SICOFI-2-approach) for this
function is a must for an adequate four channel architecture.
Figure 2
SICOFI®-4 µC Signal Flow Graph (for any channel)
Semiconductor Group
15
02.97