PEF2466HV2.2(2001) Ver la hoja de datos (PDF) - Infineon Technologies

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PEF2466HV2.2
(Rev.:2001)

Four Channel Codec Filter with PCM and Microcontroller Interface SICOFI®4-µC

Infineon Technologies 

PEB 2466

PEF 2466

Operational Description

4

Operational Description

Each channel of the SICOFI®4-µC can be in one of two stable states: “Standby” and

“Operating”. These states can be switched by programming Bit 0 (PU) in the

channel-specific configuration register CR1. “Standby” is a power-saving state. Keeping

all unused channels in this state reduces the overall system power dissipation. The third

state, “Reset”, is transient and is reached after applying power to the device (Power On),

after asserting a logic low signal to the RESET#-pin (HW-Reset), or after issuing an XOP

command with Bit 7 (RST) set to ‘1’ (SW-Reset). All four channels would be affected in

any case.

4.1

Operating States

Power-On

HW-Reset

SW-Reset

Reset

(all channels)

Standby

Ch.1

Standby

Ch.2

Standby

Ch.3

Standby

Ch.4

Figure 5

Operating

Ch.1

Operating

Ch.2

Operating

Ch.3

SICOFI®4-µC State Diagram

Operating

Ch.4

2466_206

4.1.1 Power On

All input pins must be at GND level before applying VDD to the SICOFI®4-µC. Otherwise,

the device may not enter the Reset State. In this case, the SICOFI®4-µC can be reset by

HW- or SW-Reset, or can be initialized by setting all registers to zero.

4.1.2 Hardware Reset

Voltage levels lower than 1.2 V applied to pin 23 (RESET#) for more than 3 µs will reset

the SICOFI®4-µC. Spikes that are shorter than 1 µs will be ignored. When RESET# is

released the SICOFI®4-µC will enter Standby State.

Hardware Reference Manual

12

2001-02-20

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