FDN358P Ver la hoja de datos (PDF) - Fairchild Semiconductor

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FDN358P

P-Channel Logic Level Enhancement Mode Field Effect Transistor

Fairchild Semiconductor 

Electrical Characteristics (TA = 25 OC unless otherwise noted )

Symbol Parameter

Conditions

Min Typ Max Units

OFF CHARACTERISTICS

BVDSS

∆BVDSS/∆TJ

IDSS

Drain-Source Breakdown Voltage

Breakdown Voltage Temp. Coefficient

Zero Gate Voltage Drain Current

IGSSF

Gate - Body Leakage, Forward

IGSSR

Gate - Body Leakage, Reverse

ON CHARACTERISTICS (Note 2)

VGS = 0 V, ID = -250 µA

ID = -250 µA, Referenced to 25 oC

-30

-28

V

mV/ oC

VDS = -24 V, VGS = 0 V

-1

µA

TJ = 55°C

-10

µA

VGS = 20 V, VDS = 0 V

100 nA

VGS = -20 V, VDS = 0 V

-100 nA

VGS(th)

∆VGS(th)/∆TJ

RDS(ON)

Gate Threshold Voltage

Gate Threshold Voltage Temp. Coefficient

Static Drain-Source On-Resistance

ID(ON)

On-State Drain Current

gFS

Forward Transconductance

DYNAMIC CHARACTERISTICS

VDS = VGS, ID = -250 µA

ID = -250 µA, Referenced to 25 oC

VGS = -10 V, ID = -1.5 A

TJ =125°C

VGS = -4.5 V, ID = -1.2 A

VGS = -4.5 V, VDS = -5 V

VDS = -10 V, ID = -1.5 A

-1 -1.5 -2

V

3

mV/ oC

0.11 0.125 Ω

0.15 0.21

0.175 0.2

-5

A

7

S

Ciss

Input Capacitance

Coss

Output Capacitance

Crss

Reverse Transfer Capacitance

SWITCHING CHARACTERISTICS (Note 2)

VDS = -10 V, VGS = 0 V,

f = 1.0 MHz

270

pF

150

pF

45

pF

tD(on)

Turn - On Delay Time

tr

Turn - On Rise Time

VDD = -15 V, ID = -1 A,

VGS = -10 V, RGEN = 6 Ω

tD(off)

Turn - Off Delay Time

tf

Turn - Off Fall Time

Qg

Total Gate Charge

Qgs

Gate-Source Charge

VDS = -5 V, ID = -1.5 A,

VGS = -10 V

Qgd

Gate-Drain Charge

DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS

8

16

ns

7

14

ns

17 27

ns

10 1.8

ns

6.5 9.1

nC

1

nC

1.1

nC

IS

Maximum Continuous Drain-Source Diode Forward Current

VSD

Drain-Source Diode Forward Voltage

VGS = 0 V, IS = -0.42 A (Note 2)

-0.42 A

-0.74 -1.2

V

Note:

1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the

design while RθCA is determined by the user's board design.

Typical RθJA using the board layouts shown below on FR-4 PCB in a still air environment :

drain pins. RθJC is guaranteed by

a. 250oC/W when mounted on

a

0.02 in2 pad of 2oz Cu.

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.

b. 270oC/W when mounted on

a 0.001 in2 pad of 2oz Cu.

FDN358P Rev.D

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