1
A
VDD = +5V
VSS = –5V
0.1
0.010
0.001
20
100
1k
10k
FREQUENCY – Hz
100k
Figure 18. THD vs. Frequency
3.0
VDD = +5V
VSS = –5V
2.4
VREF = 4V
DATA = FFH
1.8
1.2
0.6
0
1
10
100
1k
10k
100k
FREQUENCY – Hz
Figure 19. Output Noise Voltage Density vs. Frequency
VOUTB
CLK
VDD = +5V
VSS = –5V
VREF = 2.5V
DAC A = FFH
DAC B = OOH
F = 2MHz
50ns/DIV
Figure 20. Digital Feedthrough
AD7304/AD7305
VOUT
VDD = +5V
VSS = –5V
VREF = 2.5V
F = 1MHz
DATA = 80H 7FH
CS
Figure 21. Midscale Transition Glitch
40
20 VDD = +5V
VSS = –5V
0 VREF = 50mV rms
DAC A DATA = FFH
–20 DAC B, C, D DATA = 00H
–40
–60
–80
–100
–120
–140
V
OUTB
CT = 20 LOG
V
REF
–160
100
1k
10k
100k
1M
10M
FREQUENCY – Hz
Figure 22. Crosstalk vs. Frequency
60
–PSRR, VSS = –5V ؎ ⌬10%
50
+PSRR, VDD = +5V ؎ ⌬10%
40
–PSRR, VSS = –3V ؎ ⌬10%
30 +PSRR, VDD = +3V ؎ ⌬10%
20
10
0
10
DATA = 80H
TA = +25؇C
100
1k
10k
FREQUENCY – Hz
100k
Figure 23. Power Supply Rejection vs. Frequency
REV. A
–9–