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EPL09060F

9 COM/ 60 SEG LCD Driver

ELAN Microelectronics 

EPL09060

9 COM/60 SEG LCD Driver

7.2.2 Programmable Duty Ratio

The duty ratio is selected by using the “Set Duty Ratio” instruction.

The common output circuits are shown in the following figure. They are separated

into three shift registers and controlled by the "duty ratio register".

COM0

COM7

COMI

Common Driver (8)

Common

Driver (1)

8-bit Shift Register

1-bit Shift

Register

4

Duty Ratio

Register

Figure 8 Common Output Circuits

Duty

1/9

1/8

1/17

1/16

SHL

0

1

0

1

Common Output Pins

COM0 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COMI

Line Address

0

1

2

3

-

-

-

- COMI

7

6

5

4

-

-

-

-

-

0

1

2

3

4

5

6

7 COMI

F

E

D

C

B

A

9

8

-

Relationship between Duty Ratio and Common Output

It should be noted that when using 1/16 duty (SHL=0), the MCU writes data to the

LCD DRAM (Page 0: line addresses 0~7; Page 1: line addresses 8~15) and it will

correspond to common output pins (Page 0: COM0~7; Page 1: COM34~41). But the

EPL09060 have real output common pins COM0~7 and COMI, the others are invalid.

Initial Display Line Register

The initial display line register assigns a DDRAM line address which corresponds to

COM0 by using the “Initial display line set” instruction. It is used not only for normal

display but also for vertical display scrolling and page switching without changing the

contents of the DDRAM. However, the 9th address for the icon display cannot be

assigned for the initial display line address.

Line Counter

The line counter provides a DDRAM line address. It initializes its contents at the

switching of frame reversal signal (FR (internal)), and also counts-up in

synchronization with the common timing signal.

16 •

Product Specification (V1.0) 12.28.2005

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