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EM78P569

8-BIT OTP MICRO-CONTROLLER

ELAN Microelectronics 

EM78P569

8-bit OTP Micro-controller

1 interrupt enabled by ENI/RETI instructions

Bit 7(P70EG) : interrupt edge type of P70

0 P70 's interruption source is a rising edge signal.

1 P70 's interruption source is a falling edge signal.

CONT register is readable (CONTR) and writable (CONTW).

TCC and WDT :

There is an 8-bit counter available as prescaler for the TCC or WDT. The prescaler is available for the TCC

only or WDT only at the same time.

An 8 bit counter is available for TCC or WDT determined by the status of the bit 3 (PAB) of the CONT

register.

See the prescaler ratio in CONT register.

Fig.9 depicts the circuit diagram of TCC/WDT.

Both TCC and prescaler will be cleared by instructions which write to TCC each time.

The prescaler will be cleared by the WDTC and SLEP instructions, when assigned to WDT mode.

The prescaler will not be cleared by SLEP instructions, when assigned to TCC mode.

16.38KHz

Fig.9 Block diagram of TCC WDT

IOC5 (PORT5 I/O control, LCD bias control)

PAGE0 (LCD bias control bits)

7

6

5

4

3

2

1

0

IOC57 IOC56 IOC55

-

BIAS3 BIAS2 BIAS1 BIAS0

R/W-1 R/W-1 R/W-1

R/W-0 R/W-0 R/W-0 R/W-0

Bit 0 ~ Bit 3 (BIAS0 ~ BIAS3) : LCD operation voltage selection. V1 = VDD * (1 - n/60)

BIAS3 BIAS2 BIAS1 BIAS0 Vop (=VDD-VLCD)

Example (VDD = 3V)

0

0

0

0 VDD * (1-0/60)

0

0

0

1 VDD * (1-1/60)

0

0

1

0 VDD * (1-2/60)

0

0

1

1 VDD * (1-3/60)

3V

2.95V

2.90V

2.85V

__________________________________________________________________________________________________________________________________________________________________

* This specification is subject to be changed without notice.

28

8/19/2004 V4.4

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