EM78P157N
8-Bit Microcontroller with OTP ROM
4.2.2 Control (CONT ) Register
Bit 7
-
Bit 6
/INT
Bit 5
TS
Bit 4
TE
Bit 3
PAB
Bit 2
PSR2
Bit 1
PSR1
Bit 0
PSR0
CONT register is both readable and writable
Bit 0 ~ Bit 2 (PSR0 ~ PSR2): TCC/WDT prescaler bits
PSR2
0
0
0
0
1
1
1
1
PSR1
0
0
1
1
0
0
1
1
PSR0
0
1
0
1
0
1
0
1
TCC Rate
1:2
1:4
1:8
1:16
1:32
1:64
1:128
1:256
WDT Rate
1:1
1:2
1:4
1:8
1:16
1:32
1:64
1:128
Bit 3 (PAB): Prescaler assignment bit
0: TCC
1: WDT
Bit 4 (TE):
TCC signal edge
0: increment if the transition from low to high takes place on TCC pin
1: increment if the transition from high to low takes place on TCC pin
Bit 5 (TS):
TCC signal source
0: internal instruction cycle clock
1: transition on TCC pin
Bit 6 (/INT): Interrupt enable flag
0: masked by DISI or hardware interrupt
1: enabled by ENI/RETI instructions
Bit 7:
Not used
4.2.3 I/O Port Control (IOC5 ~ IOC6) Registers
0: defines the relative I/O pin as output
1: put the relative I/O pin into high impedance
Only the lower 4 bits of IOC5 can be defined.
IOC5 and IOC6 registers are both readable and writable
4.2.4 Prescaler Counter (IOCA ) Register
IOCA register is readable
The value of IOCA is equal to the contents of Prescaler counter
Down counter
Product Specification (V1.0) 09.22.2005
•9
(This specification is subject to change without further notice)