EM78P153E Ver la hoja de datos (PDF) - ELAN Microelectronics

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EM78P153E

8-bit microprocessor designed and developed with low-power and high-speed CMOS technology

ELAN Microelectronics 

EM78P153E

OTP ROM

Table 2 Usage of Port 6 Input Change Wake-up/Interrupt Function

Usage of Port 6 Input Status Change Wake-up/Interrupt

(I) Wake-up from Port 6 Input Status Change

(II) Port 6 Input Status Change Interrupt

(a) Before SLEEP

1. Disable WDT

2. Read I/O Port 6 (MOV R6,R6)

3. Execute "ENI" or "DISI"

4. Enable interrupt (Set IOCF.1)

5. Execute "SLEP" instruction

(b) After Wake-up

1. IF "ENI" → Interrupt vector (008H)

2. IF "DISI" → Next instruction

1. Read I/O Port 6 (MOV R6,R6)

2. Execute "ENI"

3. Enable interrupt (Set IOCF.1)

4. IF Port 6 change (interrupt)

→ Interrupt vector (008H)

4.5 RESET and Wake-up

1. RESET

A RESET is initiated by

(1) Power on reset.

(2) /RESET pin input "low", or

(3) WDT time-out (if enabled).

The device is kept in a RESET condition for a period of approx. 18ms1 (one oscillator start-up timer

period) after the reset is detected. Once the RESET occurs, the following functions are performed.

Refer to Fig.9.

• The oscillator is running, or will be started.

• The Program Counter (R2) is set to all "0".

• All I/O port pins are configured as input mode (high-impedance state).

• The Watchdog timer and prescaler are cleared.

• When power is switched on, the upper 3 bits of R3 are cleared.

• The bits of the CONT register are set to all "1" except for the Bit 6 (INT flag).

• The bits of the IOCB register are set to all "1".

• The IOCC register is cleared.

• The bits of the IOCD register are set to all "1".

• Bit 7 of the IOCE register is set to "1", and 6 is cleared.

• Bits 0~2 of RF and Bits 0~2 of IOCF register are cleared.

1 <Note>: Vdd = 5V, set up time period = 16.5ms ± 5%

Vdd = 3V, set up time period = 18ms ± 5%

This specification is subject to change without prior notice.

17

2002/03/01

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