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EM785841M Ver la hoja de datos (PDF) - ELAN Microelectronics

Número de pieza
componentes Descripción
Fabricante
EM785841M
EMC
ELAN Microelectronics EMC
EM785841M Datasheet PDF : 45 Pages
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EM785840/5841/5842
8-bit Micro-controller
IOC8 (Unused), not allowed to use
IOC9 (PORT9 I/O control, PORT9 switches)
PAGE0 (PORT9 I/O control register)
7
6
5
4
3
2
1
IOC97 IOC96 IOC95 IOC94 IOC93 IOC92 IOC91
R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
Bit 0 ~ Bit 7 (IOC90 ~ IOC97) : PORT9(0~7) I/O direction control register
0 Î put the relative I/O pin as output
1 Î put the relative I/O pin into high impedance
0
IOC90
R/W-1
PAGE1 (Unused), This page is not allowed to use.
IOCA (Unused)
PAGE0(undefined) not allowed to use
PAGE1 Unused
7
6
5
4
3
2
1
0
X
X
X
X
X
X
AD8S AD7S
-
-
-
-
-
-
R/W-0 R/W-0
Bit 0(AD7S) : Select normal I/O PORT92 pin or channel 7 input AD7 pin of ADC
0 Î P92 (I/O PORT92) pin is selected
1 Î AD7 (Channel 7 input of ADC) pin is selected
Bit 1(AD8S) : Select normal I/O PORT93 pin or channel 8 input AD8 pin of ADC
0 Î P93 (I/O PORT93) pin is selected
1 Î AD8 (Channel 8 input of ADC) pin is selected
Bit2 ~ Bit7 are undefined register, they are not allowed to use.
IOCB (ADC control)
PAGE0 (Unused), This page is not allowed to use
PAGE1 (ADC control bits)
7
6
5
4
3
2
1
0
IN2
IN1
IN0 ADCLK1 ADCLK0 ADPWR X
ADST
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
-
R/W-0
Bit 0(ADST) : AD converter start to sample
By setting to “1”, the AD will start to sample data. This bit will be cleared by hardware automatically after a
sampling.
Bit 1 : (undefined) not allowed to use. This bit must clear to 0.
Bit 2(ADPWR) : AD converter power control, 1/0 Î enable/disable.
Bit 3 ~ Bit 4 (ADCLK0 ~ ADCLK1) : AD circuit ‘s sampling clock source.
For Crystal mode:
ADCLK1 ADCLK0 Sampling rate Operation voltage
0
0
74.6K
>=3.5V
0
1
37.4K
>=3.0V
1
0
18.7K
>=2.5V
1
1
9.3K
>=2.5V
For IRC or ERIC mode, AD converter rate will change by oscillator. The formula for input frequency and AD
converter rate is: AD converter rate = oscillator / 4 / (2^ADCLK)/12
For example, if input CLK = 4M Hz:
__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to change without notice.
19
2004/11/10 V1.2

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