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EM73P461

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

ELAN Microelectronics 

EM73P461A

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

Preliminary

For the pulse width measurement mode, the counter only incresed by the rising edge of internal pulse rate as

external timer/counter input (P8.1/TRGB, P8.3/TRGA ), interrupt request will be generated as soon as

timer/counter count overflow.

P8.1/TRGB(P8.3/TRGA)

Internal pulse

TimerB(TimerA) value

n n+1 n+2 n+3 n+4 n+5

PROGRAM EXAMPLE: Enable timerA by pulse width measurement mode.

LDIA #1100b;

OUTA P28; Enable timerA with pulse width measurement mode.

HIGH SPEED TIMER/COUNTER

EM73P461A has one 8-bit high speed timer/counter (HTC). It supports three special functions : auto load

timer, melody output and pulse width measurement modes. The HTC is available for the NORMAL and

SLOW operation mode.

The HTC can be set initial value and send counter value to counter registers (P11 and P10), P31 is the

command port for HTC, user can choose different operation mode and different internal clockrate by setting

the port. The timer/counter increase one at the rising edge of internal pulse. The HTC can generate an overflow

interrupt (HTCI) when it overflows. The HTCI cannot be generated when the HTC is in the melody mode

or disabled.

Output data

÷2

P4.0/SOUND

SOUND

P4.1/TRGH

mask option

FHTC

P31(3,2)

P31(1,0)

XIN

Input data

Overflow

8-bit binary counter

Reload

P11

P10

Data bus

HTCI interrupt

Timer/counter B

P31 is the command register of the 8-bit high speed timer/counter.

P31 3 2

HTMS

1

0

HIPS

Initial value : 0000

HTMS

00

01

10

11

Mode selection

Stop

Auto load timer mode

Melody mode

Pulse width measurement mode

HIPS

00

01

10

11

Clock rate selection

NORMAL mode SLOW mode

LXIN/20 Hz

LXIN/20 Hz

LXIN/22 Hz

LXIN/22 Hz

CLK/24 Hz

Reserved

CLK/26 Hz

Reserved

P11 and P10 are the counter registers of the 8-bit high speed timer/counter. P10 is the lower nibble register

and P11 is the higher nibble register. (HT is the value of counter registers.)

P11 3 2 1 0

Higher nibble register

P10

3 2 1 0 Initial value : 0000 0000 (HT)

Lower nibble register

* This specification are subject to be changed without notice.

12.27.2001 21

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