EM73866 Ver la hoja de datos (PDF) - ELAN Microelectronics
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EM73866 Datasheet PDF : 39 Pages
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EM73866
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
** FHTC=[(XIN/2X)/(100H-HT)]/2, HT=0~255
** Example : LXIN=32K Hz, HIPS=01, HT=11110000B=0F0H.
LDIA
⇒FHTC=[(32K Hz/22)/(100H-0f0H)]/2=256 Hz.
#1111B
OUTA P11
LDIA #0000B
OUTA P10
LDIA #1001B
OUTA P31
The value of 8-bit binary up counter can be presetted by P10 and P11. The value of registers can loaded into
the HTC when the counter starts counting or occurs overflow. If user write value to the registers before the
next overflow occurs, the preset value can be changed.
The preset value will be changed when users output the different data to P10 and P11.
The count value of HTC can be read from P10 and P11. The value is unstable when user read the value during
counting. Thus, user must disable the counter before reading the value.
The P4.0/SOUND and SOUND pins will output the squre wave in the melody mode. When the CPU is not
in the melody mode, the P4.0/SOUND is high and SOUND is low.
The P4.1/RGH pin will be the input pin in the pulse width measurement mode. User must output high to P4.1/
TRGH and then it can be the HTC external input pin. When the HTC is disabled, the P4.1 pin is a normal I/
O pin.
INTERRUPTFUNCTION
There are 6 interrupt sources, 2 external interrupt sources, 4 internal interrupt sources. Multiple
interrupts are admitted according the priority.
Type
Interrupt source
Priority Interrupt Interrupt Program ROM
Latch Enable condition entry address
External External interrupt (INT0)
1
Internal High speed timer overflow interrupt(HTCI) 2
Internal TimerA overflow interrupt (TRGA)
3
Internal TimerB overflow interrupt (TRGB)
4
Internal Time base interrupt (TBI)
5
External External interrupt(INT1)
6
IL5 EI=1
002H
IL4 EI=1, MASK3=1 004H
IL3 EI=1, MASK2=1 006H
IL2 EI=1, MASK1=1 008H
IL1
00AH
IL0 EI=1,MASK0=1 00CH
INTERRUPT STRUCTURE
Reset by system reset and program
instruction
MASK0 MASK1 MASK1 MASK2 MASK3
INT1 TBI TRGB TRGA HTCI INT0
r0
r1
r2
r3
r4
r5
IL0
IL1 IL2
IL3
IL4
IL5
Reset by system reset and program
instruction
Set by program instruction
Priority checker
EI
Entry address generator
Interrupt request
* This specification are subject to be changed without notice.
Interrupt entry address
12.29.1999 21
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