EM25LV010-33RKGBS Ver la hoja de datos (PDF) - ELAN Microelectronics

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EM25LV010-33RKGBS

1 Megabit (128K x 8) Serial Flash Memory

ELAN Microelectronics 

EM25LV010

1 Megabit (128K x 8) Serial Flash Memory

SPECIFICATION

Read Manufacturer and Device ID (RDID)

The Read Manufacturer/Device ID (RDID) instruction provides both the JEDEC assigned

manufacturer ID and the specific device ID. The Read Manufacture/Device ID (RDID)

instruction is very similar to the Release from Deep Power-Down (RES) and Read Device ID

instruction. The instruction is initiated by driving the Chip Select (S#) Low and shifting the

instruction code “90h” followed by a 24-bit address (A23-A0) of 000000h. After which, the

Manufacturer ID for ELAN (7Fh, 7Fh, 1Fh) and the Device ID (10h) are shifted out on the

falling edge of the serial clock (C) with the most significant bit (MSB) shifted out first as shown

in Figure 22. If the 24-bit address is initially set to 000001h, the Device ID will be read first

and then followed by the Manufacturer ID. The Manufacturer and Device ID can be read

continuously, alternating from one to the other. The instruction is completed by driving Chip

Select (S#) High.

Power-Up and Power-Down

At Power-up and Power-down, the device must not be selected (that is, the Chip Select, S#,

must follow the voltage applied on VCC) until VCC reaches the correct value:

Vcc(min) at Power-up, and then for a further delay of tVSL

Vss at Power-down

Usually a simple pull-up resistor on Chip Select (S#) is used to insure safe and proper

Power-up and Power-down.

To prevent data corruption and inadvertent write during power up, a Power On Reset (POR)

circuit is included in the device. The logic inside the device is held at reset when VCC is less

than the POR threshold value. All operations of VWI are disabled, and the device does not

respond to any instruction.

Moreover, the device ignores all Write Enable (WREN), Page Program (PP), Block Erase (BE),

Chip Erase(CE), and Write Status Register (WRSR) instructions until a time delay of tPUW has

elapsed after the instant where VCC rises above the VWI threshold. However, the device may

not operate correctly if VCC remains below VCC(min) at such time. No Write Status Register,

Program, or Erase instruction should be sent until–

tPUW after Vcc passed the VWI threshold

tVSL after Vcc passed the Vcc(min) level

These values are specified in Table 8.

If the delay (tVSL) has elapsed after VCC has risen above VCC(min), the device can be selected

for READ instructions even if the tPUW delay has not yet fully elapsed.

This specification is subject to change without further notice. (11.08.2004 V1.0)

Page 18 of 30

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