EDE1104AASE, EDE1108AASE
Function Truth Table
The following tables show the operations that are performed when each command is issued in each state of the
DDR SDRAM.
Current state
/CS /RAS /CAS /WE Address
Command Operation
Notes
Idle
Bank(s) active
H×
×
×
×
DESL
L
H
H
H
×
NOP
L
H
L
H
BA, CA, A10 (AP)
READ
L
H
L
H
BA, CA, A10 (AP)
READA
L
H
L
L
BA, CA, A10 (AP)
WRIT
L
H
L
L
BA, CA, A10 (AP)
WRITA
L
L
H
H
BA, RA
ACT
L
L
H
L
BA, A10 (AP)
PRE
L
L
H
L
A10 (AP)
PALL
L
L
L
H×
REF
L
L
L
H×
SELF
L
L
L
L
BA, MRS-OPCODE MRS
L
L
L
L
BA, EMRS-OPCODE EMRS
H×
×
×
×
DESL
L
H
H
H
×
NOP
L
H
L
H
BA, CA, A10 (AP)
READ
L
H
L
H
BA, CA, A10 (AP)
READA
L
H
L
L
BA, CA, A10 (AP)
WRIT
L
H
L
L
BA, CA, A10 (AP)
WRITA
L
L
H
H
BA, RA
ACT
L
L
H
L
BA, A10 (AP)
PRE
L
L
H
L
A10 (AP)
PALL
L
L
L
H×
REF
L
L
L
H×
SELF
L
L
L
L
BA, MRS-OPCODE MRS
Nop or Power down
Nop or Power down
ILLEGAL
1
ILLEGAL
1
ILLEGAL
1
ILLEGAL
1
Row activating
Precharge
Precharge all banks
Auto refresh
2
Self refresh
2
Mode register accessing
2
Extended mode register accessing 2
Nop
Nop
Begin Read
Begin Read
Begin Write
Begin Write
ILLEGAL
1
Precharge
Precharge all banks
ILLEGAL
ILLEGAL
ILLEGAL
Read
L
L
L
L
BA, EMRS-OPCODE EMRS
ILLEGAL
H×
×
×
×
DESL
Continue burst to end -> Row active
L
H
H
H
×
NOP
Continue burst to end -> Row active
L
H
L
H
BA, CA, A10 (AP)
READ
Burst interrupt
1, 4
L
H
L
H
BA, CA, A10 (AP)
READA
Burst interrupt
1, 4
L
H
L
L
BA, CA, A10 (AP)
WRIT
ILLEGAL
1
L
H
L
L
BA, CA, A10 (AP)
WRITA
ILLEGAL
1
L
L
H
H
BA, RA
ACT
ILLEGAL
1
L
L
H
L
BA, A10 (AP)
PRE
ILLEGAL
1
L
L
H
L
A10 (AP)
PALL
ILLEGAL
L
L
L
H×
REF
ILLEGAL
L
L
L
H×
SELF
ILLEGAL
L
L
L
L
BA, MRS-OPCODE MRS
ILLEGAL
L
L
L
L
BA, EMRS-OPCODE EMRS
ILLEGAL
Data Sheet E0404E20 (Ver. 2.0)
20