DG9461
Vishay Siliconix
TEST CIRCUITS
Switch
Input
Logic
Input
V+
V+
NO or NC
COM
IN
GND
0V
Switch Output
VOUT
RL
300 W
CL
35 pF
CL (includes fixture and stray capacitance)
ǒ Ǔ VOUT + VCOM
RL
RL ) RON
Logic
Input
+3V
0V
50%
tr t 20 ns
tf t 20 ns
Switch
Output
0V
tON
0.9 x VOUT
tOFF
Logic “1” = Switch On
Logic input waveforms inverted for switches that have
the opposite logic sense.
FIGURE 1. Switching Time
V+
V+
NO
VNO
COM
NC
VNC
IN
GND
RL
300 W
VO
CL
35 pF
Logic
3V
Input
0V
VNC = VNO
VO
Switch 0 V
Output
90%
tD
CL (includes fixture and stray capacitance)
FIGURE 2. Break-Before-Make Interval
tr <5 ns
tf <5 ns
tD
V+
Vgen
Rgen
+
3V
V+
NC or NO
COM
IN
GND
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4-6
VOUT
CL
VOUT
DVOUT
IN
On
Off
On
Q = DVOUT x CL
IN depends on switch configuration: input polarity
determined by sense of switch.
FIGURE 3. Charge Injection
Document Number: 70832
S-63597—Rev. B, 26-Jul-99