DAC1627D1G25 Ver la hoja de datos (PDF) - NXP Semiconductors.
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DAC1627D1G25
NXP Semiconductors.
DAC1627D1G25 Datasheet PDF : 69 Pages
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NXP Semiconductors
DAC1627D1G25
Dual 16-bit DAC: up to 1.25 Gsps; x2, x4 and x8 interpolating
Table 5. Characteristics …continued
VDDA(1V8) = 1.8 V; VDDD(1V8) = 1.8 V; VDDA(3V3) = 3.3 V; Typical values measured at Tamb = +25 °C; RL = 50 Ω; IO(fs) = 20 mA;
maximum sample rate used; external PLL; no auxiliary DAC; no inverse sinus x/x; no output correction; output load condition
defined in Figure 22; output level = 1 V (p-p).
Symbol
Parameter
Conditions
Test Min
Typ
[1]
Max
Unit
Ri
input resistance
D
Ci
input capacitance
D
Digital inputs/outputs (pins MDSN, MDSP)
Vo(dif)(p-p)
peak-to-peak
C
differential output
voltage
Co(L)
output load
between GND and pin
D
capacitance
MDSN or MDSP
Ci
input capacitance between GND and pin
D
MDSN or MDSP
Ri
input resistance
D
Vi
input voltage
|Vgpd| < 50 mV[3]
C
Vidth
input differential |Vgpd| < 50 mV[3]
C
threshold voltage
Digital inputs/outputs (pins SDO, SDIO, SCLK, SCS_N, RESET_N)
VIL
LOW-level input
C
voltage
VIH
HIGH-level input
C
voltage
VOL
LOW-level output pins SDO and SDIO
C
voltage
VOH
HIGH-level
pins SDO and SDIO
C
output voltage
IIL
LOW-level input VIL = <tbd> V
I
current
IIH
HIGH-level input VIH = <tbd> V
I
current
Ci
input capacitance
D
Analog outputs (pins IOUTAP, IOUTAN, IOUTBP, IOUTBN)
IO(fs)
full-scale output
current
controlled by the analog
D
GAIN registers (see Table 46
to Table 49)
default value
D
VO
output voltage compliance range
D
VO(cm)
common-mode
D
output voltage
Ro
output resistance
D
Co
output
D
capacitance
NDAC(mono) DAC
guaranteed
D
monotonicity
-
100
-
<tbd>
-
600
-
-
-
825
−100
-
<tbd>
100
-
-
GND
-
0.7VDD(1V8) -
0
-
<tbd>
-
-
<tbd>
-
<tbd>
-
<tbd>
6.19
-
-
<tbd>
-
-
-
-
20
-
2.8
250
3
<tbd>
-
Ω
-
pF
-
mV
<tbd>
pF
-
pF
-
Ω
1575
mV
+100
mV
0.3VDD(1V8) V
VDD(1V8)
V
<tbd>
V
VDD(1V8)
V
-
μA
-
μA
-
pF
31.8
mA
-
mA
VDDA(3V3) V
-
V
-
kΩ
-
pF
-
bits
DAC1627D1G25
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 29 April 2011
© NXP B.V. 2011. All rights reserved.
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