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Fabricante

CYRF69303

Programmable Radio-on-Chip LPstar

Cypress Semiconductor 

CYRF69303

CRC16

The device may be configured to append a 16-bit CRC16 to each

packet. The CRC16 uses the USB CRC polynomial with the

added programmability of the seed. If enabled, the receiver

verifies the calculated CRC16 for the payload data against the

received value in the CRC16 field. The starting value for the

CRC16 calculation is configurable, and the CRC16 transmitted

may be calculated using either the loaded seed value or a zero

seed; the received data CRC16 is checked against both the

configured and zero CRC16 seeds.

CRC16 detects the following errors:

■ Any one bit in error

■ Any two bits in error (no matter how far apart, which column,

and so on)

■ Any odd number of bits in error (no matter where they are)

■ An error burst as wide as the checksum itself

Figure 2 shows an example packet with SOP, CRC16 and

lengths fields enabled.

Figure 2. Example Default Packet Format

Preamble N*16us

2nd Framing Symbol*

Preamble SOP1

SOP2

Length

<== P a y l o a d ==>

1st Framing Symbol*

Packet length 1 Byte Period

CRC 16

*Note: 32 us

Packet Buffers and Radio Configuration Registers

Packet data and configuration registers are accessed through

the SPI interface. All configuration registers are directly

addressed through the address field in the SPI packet.

Configuration registers are provided to allow configuration of

DSSS PN codes, data rate, operating mode, interrupt masks,

interrupt status, and others.

Packet Buffers

All data transmission and reception use the 16-byte packet

buffers: one for transmission and one for reception.

The transmit buffer allows a complete packet of up to 16 bytes of

payload data to be loaded in one burst SPI transaction, and then

transmitted with no further MCU intervention. Similarly, the

receive buffer allows an entire packet of payload data up to 16

bytes to be received with no firmware intervention required until

packet reception is complete.

The CYRF69303 IC supports packet length of up to 40 bytes;

interrupts are provided to allow an MCU to use the transmit and

receive buffers as FIFOs. When transmitting a packet longer

than 16 bytes, the MCU can load 16 bytes initially, and add

further bytes to the transmit buffer as transmission of data

creates space in the buffer. Similarly, when receiving packets

longer than 16 bytes, the MCU must fetch received data from the

FIFO periodically during packet reception to prevent it from

overflowing.

Auto Transaction Sequencer (ATS)

The CYRF69303 IC provides automated support for

transmission and reception of acknowledged data packets.

When transmitting a data packet, the device automatically starts

the crystal and synthesizer, enters transmit mode, transmits the

packet in the transmit buffer, and then automatically switches to

receive mode and waits for a handshake packet — and then

automatically reverts to sleep mode or idle mode when either an

ACK packet is received, or a time out period expires.

Similarly, when receiving in transaction mode, the device waits

in receive mode for a valid packet to be received, then

automatically transitions to transmit mode, transmits an ACK

packet, and then switches back to receive mode to await the next

packet. The contents of the packet buffers are not affected by the

transmission or reception of ACK packets.

In each case, the entire packet transaction takes place without

any need for MCU firmware action; to transmit data the MCU

simply needs to load the data packet to be transmitted, set the

length, and set the TX GO bit. Similarly, when receiving packets

in transaction mode, firmware simply needs to retrieve the fully

received packet in response to an interrupt request indicating

reception of a packet.

Interrupts

The radio function provides an interrupt (IRQ) output, which is

configurable to indicate the occurrence of various different

events. The IRQ pin may be programmed to be either active high

or active low, and be either a CMOS or open drain output.

The radio function features three sets of interrupts: transmit,

receive, and system interrupts. These interrupts all share a

single pin (IRQ), but can be independently enabled/disabled. In

transmit mode, all receive interrupts are automatically disabled,

and in receive mode all transmit interrupts are automatically

disabled. However, the contents of the enable registers are

preserved when switching between transmit and receive modes.

If more than one radio interrupt is enabled at any time, it is

necessary to read the relevant status register to determine which

event caused the IRQ pin to assert. Even when an interrupt

source is disabled, the status of the condition that would

otherwise cause an interrupt can be determined by reading the

appropriate status register. It is therefore possible to use the

devices without making use of the IRQ pin by polling the status

register(s) to wait for an event, rather than using the IRQ pin.

Document Number: 001-66502 Rev. *D

Page 7 of 70

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