CY7C1049CV33-15ZE Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY7C1049CV33-15ZE Datasheet PDF : 9 Pages
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CY7C1049CV33
AC Test Loads and Waveforms[5]
8-, 10-ns devices:
OUTPUT
Z = 50Ω
12-, 15-ns devices:
3.3V
R 317Ω
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
50Ω
1.5V
30 pF*
OUTPUT
30 pF
R2
351Ω
(a)
(b)
3.0V
ALL INPUT PULSES
High-Z characteristics:
3.3V
90%
90%
OUTPUT
R 317Ω
GND
10%
10%
5 pF
R2
351Ω
Rise Time: 1 V/ns
(c)
Fall Time: 1 V/ns
(d)
AC Switching Characteristics[6] Over the Operating Range
-8[]
-10
-12
-15
Parameter
Description
Min. Max. Min. Max. Min. Max. Min. Max. Unit
Read Cycle
tpower[7]
VCC(typical) to the first access
tRC
Read Cycle Time
tAA
Address to Data Valid
tOHA
Data Hold from Address Change
tACE
CE LOW to Data Valid
tDOE
OE LOW to Data Valid
tLZOE
tHZOE
tLZCE
tHZCE
OE LOW to Low-Z
OE HIGH to High-Z[8, 9]
CE LOW to Low-Z[9]
CE HIGH to High-Z[8, 9]
tPU
CE LOW to Power-up
tPD
CE HIGH to Power-down
Write Cycle[10, 11]
1
1
1
1
µs
8
10
12
15
ns
8
10
12
15
ns
3
3
3
3
ns
8
10
12
15
ns
4
5
6
7
ns
0
0
0
0
ns
4
5
6
7
ns
3
3
3
3
ns
4
5
6
7
ns
0
0
0
0
ns
8
10
12
15
ns
tWC
Write Cycle Time
8
10
12
15
ns
tSCE
CE LOW to Write End
6
7
8
10
ns
tAW
Address Set-up to Write End
6
7
8
10
ns
tHA
Address Hold from Write End
0
0
0
0
ns
tSA
Address Set-up to Write Start
0
0
0
0
ns
tPWE
WE Pulse Width
6
7
8
10
ns
tSD
Data Set-up to Write End
4
5
6
7
ns
tHD
tLZWE
tHZWE
Data Hold from Write End
WE HIGH to Low-Z[9]
WE LOW to High-Z[8, 9]
0
0
0
0
ns
3
3
3
3
ns
4
5
6
7
ns
Notes:
5. AC characteristics (except High-Z) for all 8-ns and 10-ns parts are tested using the load conditions shown in Figure (a). All other speeds are tested using the
Thevenin load shown in Figure (b). High-Z characteristics are tested for all speeds using the test load shown in Figure (d).
Document #: 38-05006 Rev. *C
Page 4 of 9
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