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M28W320 Ver la hoja de datos (PDF) - STMicroelectronics

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M28W320 Datasheet PDF : 69 Pages
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M28W320FCT, M28W320FCB
Bus operations
3.5
Automatic Standby
Automatic Standby provides a low power consumption state during Read mode. Following a
read operation, the device enters Automatic Standby after 150ns of bus inactivity even if
Chip Enable is Low, VIL, and the supply current is reduced to IDD1. The data Inputs/Outputs
will still output data if a bus Read operation is in progress.
3.6
Reset
During Reset mode when Output Enable is Low, VIL, the memory is deselected and the
outputs are high impedance. The memory is in Reset mode when Reset is at VIL. The power
consumption is reduced to the Standby level, independently from the Chip Enable, Output
Enable or Write Enable inputs. If Reset is pulled to VSS during a Program or Erase, this
operation is aborted and the memory content is no longer valid.
Table 2. Bus Operations(1)
Operation
E
G
W
RP
WP
VPP
DQ0-DQ15
Bus Read
VIL
VIL
VIH
VIH
Bus Write
VIL
VIH
VIL
VIH
Output Disable
VIL
VIH
VIH
VIH
Standby
VIH
X
X
VIH
Reset
X
X
X
VIL
1. X = VIL or VIH, VPPH = 12V ± 5%.
X
Don't Care
Data Output
X
VDD or VPPH
Data Input
X
Don't Care
Hi-Z
X
Don't Care
Hi-Z
X
Don't Care
Hi-Z
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