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CY7B9940V-2AC(2002) Ver la hoja de datos (PDF) - Cypress Semiconductor

Número de pieza
componentes Descripción
Fabricante
CY7B9940V-2AC
(Rev.:2002)
Cypress
Cypress Semiconductor Cypress
CY7B9940V-2AC Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
RoboClockII™ Junior
CY7B9930V
CY7B9940V
Switching Characteristics Over the Operating Range[7, 8, 9, 10, 11] (continued)
CY7B9930/40V-2 CY7B9930/40V-5
Parameter
Description
Min. Max. Min. Max.
tRELOCK2
tODCV
tPWH
tPWL
tPDEV
tOAZ
tOZA
PLL Re-Lock Time (from different frequency, different phase) with
Stable Power Supply[17]
Output duty cycle deviation from 50%[11]
Output HIGH time deviation from 50%[18]
Output LOW time deviation from 50%[18]
Period deviation when changing from reference to reference[19]
DIS[1:2] HIGH to output high-impedance from ACTIVE[12, 20]
DIS[1:2] LOW to output ACTIVE from output is high-impedance[20,
21]
–1.0
1.0
0.5
1000
1.0
1.5
2.0
0.025
10
14
–1.0
1.0
0.5
1000
1.0
1.5
2.0
0.025
10
14
Unit
µs
ns
ns
ns
UI
ns
ns
AC Test Loads and Waveform[22]
For LOCK output only For all other outputs
OUTPUT
R1 = 910
R2 = 910
R1 = 100
R2 = 100
CL
CL < 30 pF
CL < 25 pF up to 185 MHz
(Includes fixture and 10 pF from 185 to 200 MHz
probe capacitance)
3.3V
R1
R2
(a) LVTTL AC Test Load
3.3V
GND
< 1 ns
2.0V
0.8V
2.0V
0.8V
< 1 ns
(b) TTL Input Test Waveform
Notes:
17. fNOM must be within the frequency range defined by the same FS state.
18. tPWH is measured at 2.0V. tPWL is measured at 0.8V.
19. UI = Unit Interval. Examples: 1 UI is a full period. 0.1 UI is 10% of period.
20. Measured at 0.5V deviation from starting voltage.
21. For tOZA minimum, CL = 0 pF. For tOZA maximum, CL= 25 pF to 18 MHz, 10 pF from 185 to 200 MHz.
22. These figures are for illustration only. The actual ATE loads may vary.
Document #: 38-07271 Rev. *B
Page 6 of 9
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