CY14B104LA-ZS25XC Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY14B104LA-ZS25XC Datasheet PDF : 23 Pages
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CY14B104LA, CY14B104NA
AutoStore/Power Up RECALL
Parameters
Description
tHRECALL [18] Power Up RECALL Duration
tSTORE [19] STORE Cycle Duration
tDELAY [20] Time Allowed to Complete SRAM Cycle
VSWITCH
tVCCRISE[11]
VHDIS[11]
tLZHSB[11]
tHHHD[11]
Low Voltage Trigger Level
VCC Rise Time
HSB Output Disable Voltage
HSB To Output Active Time
HSB High Active Time
20 ns
Min
Max
20
8
20
2.65
150
1.9
5
500
25 ns
Min
Max
20
8
25
2.65
150
1.9
5
500
Switching Waveforms
Figure 11. AutoStore or Power Up RECALL[21]
45 ns
Unit
Min
Max
20
ms
8
ms
25
ns
2.65
V
150
μs
1.9
V
5
μs
500
ns
VCC
VSWITCH
VHDIS
HSB OUT
Autostore
POWER-
UP
RECALL
Read & Write
Inhibited
(RWI)
VVCCRISE
tHHHD
Note 19
tSTORE
tLZHSB
tHRECALL
tDELAY
tHHHD
Note19
tSTORE
22
Note
tDELAY
tLZHSB
tHRECALL
POWER-UP
RECALL
Read & Write
BROWN POWER-UP
OUT
RECALL
Autostore
Read & Write
POWER
DOWN
Autostore
Notes
18. tHRECALL starts from the time VCC rises above VSWITCH.
19. If an SRAM write has not taken place since the last nonvolatile cycle, no AutoStore or Hardware Store takes place.
20. On a Hardware STORE, Software Store / Recall, AutoStore Enable / Disable and AutoStore initiation, SRAM operation continues to be enabled for time tDELAY.
21. Read and write cycles are ignored during STORE, RECALL, and while VCC is below VSWITCH.
22. HSB pin is driven HIGH to VCC only by internal 100 kOhm resistor, HSB driver is disabled.
Document #: 001-49918 Rev. *B
Page 13 of 23
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