CP2400 Ver la hoja de datos (PDF) - Silicon Laboratories

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Fabricante

CP2400

128/64 SEGMENT LCD DRIVER

Silicon Laboratories 

CP2400/1/2/3

3. Electrical Characteristics

Table 3.1. Global Electrical Characteristics

VDD = 1.8 to 3.6 V, –40 to +85 °C unless otherwise specified.

Parameter

Conditions

Min

Typ

Max Units

Supply Voltage

1.8

3.3

3.6

V

SYSCLK

0

—

25

TSYSH (SYSCLK High Time)

TSYSL (SYSCLK Low Time)

18

—

—

18

—

—

Specified Operating Temperature Range

–40

—

+85

Normal Mode Supply Current (VDD = 3.0 V, 25 °C unless otherwise specified)

20 MHz Internal Oscillator divided by 1,

SYSCLK = 20 MHz, SPI data rate = 1 Mbps*

VDD = 3.6 V

VDD = 3.0 V

VDD = 1.8 V

—

740

790

—

700

—

—

630

—

Accessing RAM at 1 Mbps

—

740

—

SYSCLK = 10 MHz, SPI data rate* = 500 kbps

—

380

—

SYSCLK = 5 MHz, SPI data rate* = 250 kbps

—

230

—

SYSCLK = 2.5 MHz, SPI data rate* = 125 kbps

—

150

—

RAM Preservation Mode Supply Current (VDD = 3.0 V, 25 °C unless otherwise specified)

32.768 kHz SmaRTClock Selected as the

System Clock, Internal Oscillator Disabled

—

20

—

Ultra Low Power LCD Mode Supply Current (VDD = 3.0 V, 25 °C unless otherwise specified)

LCD Enabled with Charge Pump Enabled,

60 Hz Refresh Rate, No Load

SmaRTClock with 32.768 kHz crystal

4-Mux mode

3-Mux mode

2-Mux mode

static mode

—

2.3

—

—

2.3

—

—

2.2

—

—

2.1

—

MHz

ns

ns

°C

µA

µA

µA

µA

µA

µA

µA

LCD Enabled with Charge Pump Enabled,

60 Hz Refresh Rate, No Load

SmaRTClock in Self-Oscillate Mode (AGC

Enabled, LOADCAP = 0x0F)

4-Mux mode

3-Mux mode

2-Mux mode

static mode

—

1.7

—

µA

—

1.7

—

—

1.7

—

—

1.5

—

Ultra Low Power SmaRTClock Mode Supply Current (VDD = 3.0 V, 25 °C unless otherwise specified)

External Crystal (RTC Timer Enabled)

Fosc = 32.768 kHz

—

2.5

—

µA

CMOS Clock Input on XTAL1 and XTAL2 Pins Fosc = 32.768 kHz

—

2.3

—

µA

(RTC Timer Enabled)

Self-Oscillate Mode (AGC enabled,

LOADCAP = 0x0F) (RTC Timer Enabled)

Fosc = 14 kHz

Shutdown Mode (VDD = 3.0 V, 25 °C unless otherwise specified)

—

2.0

—

µA

Shutdown (no clocks active, regulator disabled)

VDD = 3.6 V

VDD = 3.0 V

VDD = 1.8 V

—

0.030

—

µA

—

0.020

—

—

0.015

—

*Note: Indicates maximum allowed SPI data rate in this mode. Power measurement taken with no SPI traffic.

12

Rev. 1.0

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