CMX625 Ver la hoja de datos (PDF) - CML Microsystems Plc
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CMX625 Datasheet PDF : 34 Pages
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ISDN TA POTS Interface
CMX625
1.5.14 Register Set
Write Only Registers
Data Byte Structure
Addr. Register
7
6
5
4
3
2
1
0
$1 RESET
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Tx Output Tx Enable DTMF Rx:
SPM:
FSK Mode: FSK Mode:
$3 SETUP
Buffer
Ring Signal Ring Signal
0=Disable 0=Disable 0=Disable 0=12kHz Select [1] Select [0] 0=Sync
0=V23
1=Enable 1=Enable 1=Enable 1=16kHz
1=Async 1=Bell 202
SPM O/P: Tone/FSK: Tone/FSK: Tx Level: Tx Level: Tx Level: Tone Fields: Tone Fields:
$4 MODE 0=Disable 0=Disable 0=Tone
1=Enable 1=Enable 1=FSK
MSB
LSB
MSB
LSB
TX
$5
DATA
D7
D6
D5
D4
D3
D2
D1
D0
MSB
LSB
TX
$6 TONES
D7
D6
D5
D4
D3
D2
D1
D0
MSB
LSB
MSB
LSB
IC Channel Remote
IOM
Codec
Codec
Bus Reversal Digital IOM
C/I1
C/I1
C/I1
$8 CONTROL Channel Channel
0
0=Normal Loopback Channel Channel Channel
Select [1] Select [0]
1=Reverse 0=No loopbk Output
Output
Output
1=Loopback Control [2] Control [1] Control [0]
INT-
Mask
Mask
Mask
Mask
Mask
Mask
$9 ERRUPT Status [7] Status [6] Status [5] Status [4] Status [3] Status [2]
0
0
MASK
Codec
Local
CODEC
Enable PCM Codec: Analogue
$C CONTROL 0=Disable 0=A-Law Loopback
0
0
0
0
0
1=Enable 1=µ-Law 0=No loopbk
1=Loopback
Read Only Registers
Data Byte Structure
Addr. Register
7
6
5
4
3
2
1
0
DEVICE
$0
ID
1
0
0
1
1
0
0
1
FSK Mode: FSK Mode: DTMF Rx: DTMF Rx:
IOM:
$A STATUS FSK Tx Data FSK Tx Data Status 1=Detected
Tx
Underflow Ready
Change 0=No Tone Abort
Time Out
DTMF RX
DTMF:
$B
DATA
0
0
0
0
Rx Data
(D3 MSB)
IOM:
Rx
Abort
DTMF:
Rx Data
(D2)
0
0
DTMF:
Rx Data
(D1)
DTMF:
Rx Data
(D0 LSB)
Notes:
1. Accessing the RESET Register clears all of the bits in the SETUP, MODE, TX DATA, TX TONES,
IOM CONTROL, INTERRUPT MASK, CODEC CONTROL, STATUS and DTMF RX DATA registers
and will initialise the device. This a single-byte transaction consisting of the address byte value $1.
2. If any of bits 2, 3, 4, 5, 6 or 7 of the STATUS Register is ‘1’ then the IRQN output will be pulled low
when the appropriate bit contains an unmasked logic ‘1’ in the INTERRUPT MASK Register.
3. Reading the STATUS Register clears the IRQN output (when the appropriate bit contains an
unmasked logic ‘1’ in the INTERRUPT MASK Register) and also clears all the STATUS Register bits 2
to 7, if set.
1.5.15 Programming the CMX625
2001 Consumer Microcircuits Limited
20
D/625/2
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