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C167CS-XC

16-Bit Single-Chip Microcontroller Bare Die Delivery

Infineon Technologies 

C167CS-xC Bare Die

Step BA

Table 2

Pad Definitions and Functions (cont’d)

Symbol Pad In / Position [µm] Function

Num Out

x

y

P7.6 135 I/O

0 2174 Port 7 input/output, (open drain, sp. threshold),

Capt.-Input/Comp.-Output CC30IO.

P7.7 136 I/O

0 1990 Port 7 input/output, (open drain, sp. threshold),

Capt.-Input/Comp.-Output CC31IO.

P5.0 137 I

0 1701 Port 5 input, analog input AN0.

P5.1 138 I

0 1546 Port 5 input, analog input AN1.

P5.2 139 I

0 1391 Port 5 input, analog input AN2.

P5.3 140 I

0 1236 Port 5 input, analog input AN3.

P5.4 141 I

0 1081 Port 5 input, analog input AN4.

P5.5 142 I

0 925 Port 5 input, analog input AN5.

P5.6 143 I

0 770 Port 5 input, analog input AN6.

P5.7 144 I

0 615 Port 5 input, analog input AN7.

P5.8 145 I

0 460 Port 5 input, analog input AN8.

P5.9 146 I

0 305 Port 5 input, analog input AN9.

1) Prepared to enable Enhanced Mode, i.e. low-power oscillator mode, single-chip reset with RD/ALE-

configuration.

Note: All 9SS pads and all 9DD pads must be connected to the system ground and the

power supply, respectively.

The pad definitions and locations in this table are only valid for the indicated device

and design step.

Data Sheet

12

V1.0, 2001-08

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