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Fabricante

C167CR-L33M

16-Bit Single-Chip Microcontroller

Infineon Technologies 

C167CR

C167SR

General Device Information

Table 3

Pin Definitions and Functions P-BGA-176-2 (cont’d)

Symbol Pin Input Function

Num. Outp.

P8

P8.0

P8.1

P8.2

P8.3

P8.4

P8.5

P8.6

P8.7

IO Port 8 is an 8-bit bidirectional I/O port. It is bit-wise

programmable for input or output via direction bits. For a pin

configured as input, the output driver is put into high-

impedance state. Port 8 outputs can be configured as

push/pull or open drain drivers. The input threshold of Port 8

is selectable (TTL or special).

The following Port 8 pins also serve for alternate functions:

B10 I/O CC16IO CAPCOM2: CC16 Capture Inp./Compare Outp.

A10 I/O CC17IO CAPCOM2: CC17 Capture Inp./Compare Outp.

D9 I/O CC18IO CAPCOM2: CC18 Capture Inp./Compare Outp.

C9 I/O CC19IO CAPCOM2: CC19 Capture Inp./Compare Outp.

B9 I/O CC20IO CAPCOM2: CC20 Capture Inp./Compare Outp.

A9 I/O CC21IO CAPCOM2: CC21 Capture Inp./Compare Outp.

D8 I/O CC22IO CAPCOM2: CC22 Capture Inp./Compare Outp.

C8 I/O CC23IO CAPCOM2: CC23 Capture Inp./Compare Outp.

P6

P6.0

P6.1

P6.2

P6.3

P6.4

P6.5

P6.6

P6.7

IO Port 6 is an 8-bit bidirectional I/O port. It is bit-wise

programmable for input or output via direction bits. For a pin

configured as input, the output driver is put into high-

impedance state. Port 6 outputs can be configured as

push/pull or open drain drivers. The input threshold of Port 6

is selectable (TTL or special).

The Port 6 pins also serve for alternate functions:

A13 O CS0

Chip Select 0 Output

B12 O CS1

Chip Select 1 Output

D10 O CS2

Chip Select 2 Output

C11 O CS3

Chip Select 3 Output

A12 O CS4

Chip Select 4 Output

B11 I

HOLD External Master Hold Request Input

C10 I/O HLDA

Hold Acknowledge Output (master mode) or

Input (slave mode)

A11 O BREQ Bus Request Output

NMI C14 I

Non-Maskable Interrupt Input. A high to low transition at this

pin causes the CPU to vector to the NMI trap routine. When

the PWRDN (power down) instruction is executed, the NMI

pin must be low in order to force the C167CR to go into power

down mode. If NMI is high, when PWRDN is executed, the

part will continue to run in normal mode.

If not used, pin NMI should be pulled high externally.

Data Sheet

19

V3.3, 2005-02

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