BD8381EFV-M Ver la hoja de datos (PDF) - ROHM Semiconductor

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BD8381EFV-M

LED Drivers for Automotive Light

ROHM Semiconductor 

BD8381EFV-M

Technical Note

●Notes for use

1. Absolute maximum ratings

We are careful enough for quality control about this IC. So, there is no problem under normal operation, excluding that it

exceeds the absolute maximum ratings. However, this IC might be destroyed when the absolute maximum ratings, such

as impressed voltages or the operating temperature range(Topr), is exceeded, and whether the destruction is short circuit

mode or open circuit mode cannot be specified. Please take into consideration the physical countermeasures for safety,

such as fusing, if a particular mode that exceeds the absolute maximum rating is assumed.

2. Reverse polarity connection

Connecting the power line to the IC in reverse polarity (from that recommended) will damage the part. Please utilize the

direction protection device as a diode in the supply line.

3. Power supply line

Due to return of regenerative current by reverse electromotive force, using electrolytic and ceramic suppress filter capacitors

(0.1µF) close to the IC power input terminals (Vcc and GND) are recommended. Please note the electrolytic capacitor value

decreases at lower temperatures and examine to dispense physical measures for safety. And, for ICs with more than one

power supply, it is possible that rush current may flow instantaneously due to the internal powering sequence and delays.

Therefore, give special consideration to power coupling capacitance, width of power wiring, GND wiring, and routing of

wiring. Please make the power supply lines (where large current flow) wide enough to reduce the resistance of the power

supply patterns, because the resistance of power supply pattern might influence the usual operation.

4. GND line

The ground line is where the lowest potential and transient voltages are connected to the IC.

5. Thermal design

Do not exceed the power dissipation (Pd) of the package specification rating under actual operation, and please design

enough temperature margins.

6. Short circuit mode between terminals and wrong mounting

Do not mount the IC in the wrong direction and be careful about the reverse-connection of the power connector.

Moreover, this IC might be destroyed when the dust short the terminals between them or power supply, GND.

7. Radiation

Strong electromagnetic radiation can cause operation failures.

8. ASO(Area of Safety Operation.)

Do not exceed the maximum ASO and the absolute maximum ratings of the output driver.

9. TSD(Thermal shut-down)

The TSD is activated when the junction temperature (Tj) reaches 175℃(with 25℃ hysteresis), and the output terminal is

switched to Hi-z. The TSD circuit aims to intercept IC from high temperature. The guarantee and protection of IC are not purpose.

Therefore, please do not use this IC after TSD circuit operates, nor use it for assumption that operates the TSD circuit.

10. Inspection by the set circuit board

The stress might hang to IC by connecting the capacitor to the terminal with low impedance. Then, please discharge

electricity in each and all process. Moreover, in the inspection process, please turn off the power before mounting the IC,

and turn on after mounting the IC. In addition, please take into consideration the countermeasures for electrostatic

damage, such as giving the earth in assembly process, transportation or preservation.

11. IC terminal input

This IC is a monolithic IC, and has P+ isolation and P substrate for the element separation. Therefore, a parasitic PN

junction is firmed in this P-layer and N-layer of each element. For instance, the resistor or the transistor is connected to

the terminal as shown in the figure below. When the GND voltage potential is greater than the voltage potential at

Terminals A or B, the PN junction operates as a parasitic diode. In addition, the parasitic NPN transistor is formed in said

parasitic diode and the N layer of surrounding elements close to said parasitic diode. These parasitic elements are

formed in the IC because of the voltage relation. The parasitic element operating causes the wrong operation and

destruction. Therefore, please be careful so as not to operate the parasitic elements by impressing to input terminals

lower voltage than GND(P substrate). Please do not apply the voltage to the input terminal when the power-supply

voltage is not impressed. Moreover, please impress each input terminal lower than the power-supply voltage or equal to

the specified range in the guaranteed voltage when the power-supply voltage is impressing.

Terminal-A

P+

Parasitic

element

Resistor

Terminal-A

Terminal-B C

P P+

Parasitic

element

P+

P-Substrate

GND

Parasitic

element

Transistor(NPN)

B

E

P

P+

P-Substrate

GND

GND

Terminal-B

BC

E

Surrounding

elements

Parasitic

element

GND

structure of IC

12. Earth wiring pattern

Use separate ground lines for control signals and high current power driver outputs. Because these high current outputs

that flows to the wire impedance changes the GND voltage for control signal. Therefore, each ground terminal of IC must

be connected at the one point on the set circuit board. As for GND of external parts, it is similar to the above-mentioned

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19/20

2011.04 - Rev.A

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