XMEGA A3U
7.4 Data Memory
The Data memory contains the I/O Memory, internal SRAM, optionally memory mapped
EEPROM, and external memory if available. The data memory is organized as one continuous
memory section, see Figure 7-2 on page 11. To simplify development, I/O Memory, EEPROM
and SRAM will always have the same start addresses for all XMEGA devices.
Figure 7-2. Data Memory Map (Hexadecimal address)
Byte Address ATxmega192A3U
Byte Address
0
I/O Registers
0
FFF
(4K)
FFF
1000
17FF
EEPROM
(2K)
1000
17FF
RESERVED
2000
5FFF
Internal SRAM
(16K)
2000
3FFF
ATxmega128A3U
I/O Registers
(4K)
EEPROM
(2K)
RESERVED
Internal SRAM
(8K)
Byte Address
0
FFF
1000
17FF
2000
2FFF
ATxmega64A3U
I/O Registers
(4K)
EEPROM
(2K)
RESERVED
Internal SRAM
(4K)
Byte Address
0
FFF
1000
1FFF
2000
5FFF
ATxmega256A3U
I/O Registers
(4K)
EEPROM
(4K)
Internal SRAM
(16K)
11
8386A–AVR–07/11