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ATTINY87-XU

8-bit Microcontroller with 8K/16K Bytes In-System Programmable Flash and LIN Controller

Atmel Corporation 

ATtiny87/ATtiny167

3. AVR Memories

This section describes the different memories in the ATtiny87/167. The AVR architecture has

two main memory spaces, the Data memory and the Program memory space. In addition, the

ATtiny87/167 features an EEPROM Memory for data storage. All three memory spaces are

linear and regular.

Table 3-1. Memory Mapping.

Memory

Size

Flash

Start Address

End Address

32 Registers

I/O

Registers

Ext I/O

Registers

Internal

SRAM

EEPROM

Size

Start Address

End Address

Size

Start Address

End Address

Size

Start Address

End Address

Size

Start Address

End Address

Size

Start Address

End Address

Mnemonic

Flash size

-

Flash end

-

-

-

-

-

-

-

-

-

ISRAM size

ISRAM start

ISRAM end

E2 size

-

E2 end

ATtiny87

ATtiny167

8 K bytes

16 K bytes

0x0000

0x1FFF(1)

0x0FFF(2)

0x3FFF(1)

0x1FFF(2)

32 bytes

0x0000

0x001F

64 bytes

0x0020

0x005F

160 bytes

0x0060

0x00FF

512 bytes

0x0100

0x02FF

512 bytes

0x0000

0x01FF

Notes: 1. Byte address.

2. Word (16-bit) address.

3.1 In-System Re-programmable Flash Program Memory

The ATtiny87/167 contains On-chip In-System Reprogrammable Flash memory for program

storage (see “Flash size” in Table 3-1 on page 15). Since all AVR instructions are 16 or 32 bits

wide, the Flash is organized as 16 bits wide. ATtiny87/167 does not have separate Boot

Loader and Application Program sections, and the SPM instruction can be executed from the

entire Flash. See SELFPRGEN description in Section 20.2.1 “SPMCSR – Store Program

Memory Control and Status Register” on page 219 for more details.

The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATtiny87/167

Program Counter (PC) address the program memory locations. Section 21. “Memory Pro-

gramming” on page 225 contains a detailed description on Flash data serial downloading

using the SPI pins.

Constant tables can be allocated within the entire Program memory address space (see the

LPM – Load Program memory instruction description).

15

8265A–AVR–08/10

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