External Reset
Figure 13. “MCU Start-up, RESET Tied to VCC
VCC
VPOT
RESET
VRST
TIME-OUT
tTOUT
INTERNAL
RESET
Figure 14. MCU Start-up, RESET Extended Externally
VCC
VPOT
RESET
VRST
TIME-OUT
tTOUT
INTERNAL
RESET
An External Reset is generated by a low-level on the RESET pin. Reset pulses longer
than 500 ns will generate a reset, even if the clock is not running. Shorter pulses are not
guaranteed to generate a reset. When the applied signal reaches the Reset Threshold
Voltage (VRST) on its positive edge, the delay timer starts the MCU after the Time-out
period tTOUT has expired.
Figure 15. External Reset during Operation
16 ATtiny15L
1187H–AVR–09/07