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ATTINY12(2003) Ver la hoja de datos (PDF) - Atmel Corporation

Número de pieza
componentes Descripción
Fabricante
ATTINY12
(Rev.:2003)
Atmel
Atmel Corporation Atmel
ATTINY12 Datasheet PDF : 91 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
Relative Program Addressing, Figure 12. Relative Program Memory Addressing
RJMP and RCALL
+1
Constant Addressing Using
the LPM Instruction
Program execution continues at address PC + k + 1. The relative address k is -2048 to
2047.
Figure 13. Code Memory Constant Addressing
15
10
Z-REGISTER
PROGRAM MEMORY
$000
$1FF
Constant byte address is specified by the Z-register contents. The 15 MSBs select word
address (0 - 511), the LSB selects low byte if cleared (LSB = 0) or high byte if set
(LSB = 1).
Subroutine and Interrupt
Hardware Stack
The ATtiny11/12 uses a 3-level-deep hardware stack for subroutines and interrupts. The
hardware stack is 9 bits wide and stores the program counter (PC) return address while
subroutines and interrupts are executed.
RCALL instructions and interrupts push the PC return address onto stack level 0, and
the data in the other stack levels 1-2 are pushed one level deeper in the stack. When a
RET or RETI instruction is executed the returning PC is fetched from stack level 0, and
the data in the other stack levels 1-2 are popped one level in the stack.
If more than three subsequent subroutine calls or interrupts are executed, the first val-
ues written to the stack are overwritten. Pushing four return addresses A1, A2, A3, and
A4, followed by four subroutine or interrupt returns, will pop A4, A3, A2, and once more
A2 from the hardware stack.
12 ATtiny11/12
1006D–AVR–07/03

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