ATMEGA8535 Ver la hoja de datos (PDF) - Atmel Corporation
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ATMEGA8535 Datasheet PDF : 321 Pages
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AVR ATmega8535
Memories
This section describes the different memories in the ATmega8535. The AVR architec-
ture has two main memory spaces, the Data Memory and the Program Memory space.
In addition, the ATmega8535 features an EEPROM Memory for data storage. All three
memory spaces are linear and regular.
In-System
Reprogrammable Flash
Program Memory
The ATmega8535 contains 8K bytes On-chip In-System Reprogrammable Flash mem-
ory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is
organized as 4K x 16. For software security, the Flash Program memory space is
divided into two sections, Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega8535 Program Counter (PC) is 12 bits wide, thus addressing the 4K program
memory locations. The operation of Boot Program section and associated Boot Lock
bits for software protection are described in detail in “Boot Loader Support – Read-
While-Write Self-Programming” on page 224. “Memory Programming” on page 237 con-
tains a detailed description on Flash Programming in SPI or Parallel Programming
mode.
Constant tables can be allocated within the entire program memory address space (see
the LPM – Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in “Instruction Execu-
tion Timing” on page 13.
Figure 8. Program Memory Map
$000
Application Flash Section
16 ATmega8535(L)
Boot Flash Section
$FFF
2502K–AVR–10/06
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