AS2702-20(2001) Ver la hoja de datos (PDF) - austriamicrosystems AG
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AS2702-20 Datasheet PDF : 18 Pages
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AS-Interface Slave IC
AS2702 (SAP4.1)
input data to be valid within a specific time window relative to the HL-edge of the strobe,
after completion of the strobe’s L-phase.
If necessary, output data as per ha) and hb) can be easily latched with the LH-edge of strobe
DSTBn as they will remain valid for about 0.4 µs beyond as a minimum.
Care must be taken however, that signal delay added by external circuitry is lower for the
strobe than for the data.
Dx
Dx
tSTB
Data out
t + DSTBn 0.4 µs
Data out
t + t DSTBn OUTOFF
DSTBn
t
DSTBn
t
INPmin
t
INPmax
Data in
Data in
Fig. 2: Timing of data transfer at data port D3, …, D0 relative to strobe DSTBn
The following table specifies the timing parameters relating to fig. 2:
6\PERO
tSTB
tDSTBn
tOUTOFF
tINP
3DUDPHWHU
Delay DSTBn HL-edge to Dx
output data valid
DSTBn strobe width
Delay DSTBn LH-edge to Dx
output off
Input data valid time window
PLQ
PD[
8QLW
1RWH
1.5
µs
6
6.8
µs
1
0.2
1
µs
2
10.5
12.5
µs
3
Notes:
1
2
3
Pulse width depends substantially on value of external pull-up resistor
Applies only to data port pins set to 'output / input' operation
Timing reference is DSTBn HL-edge.
Applies only to data port pins set to either 'output / input' or 'input' operation
Rev. C, January 2001
Page 8 of 18
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