APW7062B(2008) Ver la hoja de datos (PDF) - Anpec Electronics
Número de pieza
componentes Descripción
Fabricante
APW7062B Datasheet PDF : 18 Pages
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APW7062B
Application Information (Cont.)
Compensation (Cont.)
FLC
-40dB/dec
The compensation circuit is shown in Figure 5. R3 and
C1 introduce a zero and C2 introduces a pole to reduce
the switching noise. The transfer function of error ampli-
fier is given by:
FESR
GAINAMP =
gm× Zo
=
gm × R3 +
1
sC1
//
1
sC2
Gain
-20dB/dec
=
gm ×
(R3sC1 + 1)
s
×
s
+
C1+ C2
R3 × C1× C2
Frequency
The poles and zero of the compensation network are:
Figure 3. The Output LC Filter Gain & Frequency
The PWM modulator is shown in Figure 4. The input is
the output of the error amplifier and the output is the PHASE
node. The transfer function of the PWM modulator is given
by:
VIN
GAINPWM = ∆VOSC
FP =
FZ =
1
2× π ×R3 × C1× C2
C1+ C2
1
2× π ×R3 × C1
VOUT
VOSC
Output of
Error
Amplifier
PWM
Comparator
Driver
VIN
R1
R2
PHASE
FB
VREF
Error
Amplifier
-
+
COMP
R3
C2
C1
Driver
Figure 5. Compensation Network
Figure 4. The PWM Modulator
Copyright © ANPEC Electronics Corp.
12
Rev. A.4 - Oct., 2008
www.anpec.com.tw
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